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IQE022N06LM5CG PDF预览

IQE022N06LM5CG

更新时间: 2023-09-03 20:35:31
品牌 Logo 应用领域
英飞凌 - INFINEON
页数 文件大小 规格书
11页 1153K
描述
IQE022N06LM5CG is Infineon’s new best-in-class OptiMOS™ 5 Power MOSFET 60 V logic level in PQFN 3.3x3.3 Source-Down Center-Gate (CG) package, offering the industry’s lowest on-state resistance RDS(on) at 25˚C, superior thermal performance, and optimized parallelization. The OptiMOS™ Source-Down is a revolutionary technology with a flipped silicon die inside, offering several advantages such as better thermal capability, higher power density and improved layout possibilities. Combined with the new PQFN 3.3x3.3 Center-Gate package, IQE022N06LM5CG is targeted for high power density and performance SMPS products commonly found in telecom and data servers.

IQE022N06LM5CG 数据手册

 浏览型号IQE022N06LM5CG的Datasheet PDF文件第2页浏览型号IQE022N06LM5CG的Datasheet PDF文件第3页浏览型号IQE022N06LM5CG的Datasheet PDF文件第4页浏览型号IQE022N06LM5CG的Datasheet PDF文件第5页浏览型号IQE022N06LM5CG的Datasheet PDF文件第6页浏览型号IQE022N06LM5CG的Datasheet PDF文件第7页 
IQE022N06LM5CG  
MOSFET  
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ60ꢀV  
PG-TTFN-9  
5
6
7
8
Features  
•ꢀOptimizedꢀforꢀhighꢀperformanceꢀSMPS,ꢀe.g.ꢀsynchronousꢀrectification  
•ꢀN-channel,ꢀlogicꢀlevel  
9
•ꢀVeryꢀlowꢀon-resistanceꢀRDS(on)  
•ꢀSuperiorꢀthermalꢀresistance  
4
3
2
1
•ꢀ100%ꢀavalancheꢀtested  
•ꢀPb-freeꢀleadꢀplating;ꢀRoHSꢀcompliant  
•ꢀHalogen-freeꢀaccordingꢀtoꢀIEC61249-2-21  
Productꢀvalidation  
FullyꢀqualifiedꢀaccordingꢀtoꢀJEDECꢀforꢀIndustrialꢀApplications  
Drain  
Pin 5-8  
Tableꢀ1ꢀꢀꢀꢀꢀKeyꢀPerformanceꢀParameters  
Gate  
Pin 9  
Parameter  
Value  
Unit  
Source  
Pin 1-4  
VDS  
60  
V
RDS(on),max@10V  
RDS(on),max@4.5V  
ID  
2.2  
2.9  
151  
45  
m  
mΩ  
A
Qoss  
nC  
nC  
QG(0V...4.5V)  
26  
Typeꢀ/ꢀOrderingꢀCode  
Package  
Marking  
RelatedꢀLinks  
IQE022N06LM5CG  
PG-TTFN-9  
022N6C5  
-
Final Data Sheet  
1
Rev.ꢀ2.0,ꢀꢀ2023-01-12  

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