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X9C103S PDF预览

X9C103S

更新时间: 2024-02-22 08:19:51
品牌 Logo 应用领域
英特矽尔 - INTERSIL /
页数 文件大小 规格书
11页 257K
描述
Digitally Controlled Pot (XDCP)

X9C103S 技术参数

生命周期:Obsolete包装说明:PLASTIC, SOIC-8
Reach Compliance Code:unknown风险等级:5.75
Is Samacsys:N控制接口:INCREMENT/DECREMENT
转换器类型:DIGITAL POTENTIOMETERJESD-30 代码:R-PDSO-G8
长度:4.9 mm位置数:100
端子数量:8最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE认证状态:Not Qualified
电阻定律:LINEAR最大电阻器端电压:5 V
最小电阻器端电压:-5 V筛选级别:MIL-STD-883
座面最大高度:1.75 mm标称供电电压:5 V
表面贴装:YES温度等级:MILITARY
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL标称总电阻:10000 Ω
宽度:3.9 mmBase Number Matches:1

X9C103S 数据手册

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X9C102, X9C103, X9C104, X9C503  
®
Data Sheet  
September 19, 2005  
FN8222.1  
DESCRIPTION  
Digitally Controlled Potentiometer  
(XDCP™)  
The X9Cxxx are Intersil digitally controlled (XDCP)  
potentiometers. The device consists of a resistor  
array, wiper switches, a control section, and nonvola-  
tile memory. The wiper position is controlled by a  
three-wire interface.  
FEATURES  
• Solid-state potentiometer  
• 3-wire serial interface  
• 100 wiper tap points  
—Wiper position stored in nonvolatile memory  
and recalled on power-up  
• 99 resistive elements  
—Temperature compensated  
—End to end resistance, ±20%  
—Terminal voltages, ±5V  
• Low power CMOS  
The potentiometer is implemented by a resistor array  
composed of 99 resistive elements and a wiper switch-  
ing network. Between each element and at either end  
are tap points accessible to the wiper terminal. The  
position of the wiper element is controlled by the CS,  
U/D, and INC inputs. The position of the wiper can be  
stored in nonvolatile memory and then be recalled  
upon a subsequent power-up operation.  
—VCC = 5V  
—Active current, 3mA max.  
—Standby current, 750µA max.  
• High reliability  
The device can be used as a three-terminal potentiom-  
eter or as a two-terminal variable resistor in a wide  
variety of applications including:  
—Endurance, 100,000 data changes per bit  
—Register data retention, 100 years  
• X9C102 = 1k  
• X9C103 = 10kΩ  
• X9C503 = 50kΩ  
– control  
– parameter adjustments  
– signal processing  
• X9C104 = 100kΩ  
• Packages  
—8-lead SOIC and DIP  
• Pb-free plus anneal available (RoHS compliant)  
BLOCK DIAGRAM  
U/D  
INC  
CS  
7-Bit  
RH/VH  
99  
98  
97  
96  
Up/Down  
Counter  
VCC (Supply Voltage)  
Up/Down  
(U/D)  
7-Bit  
Nonvolatile  
Memory  
VH/RH  
One  
of  
Control  
and  
Memory  
Increment  
(INC)  
RW/VW  
One-  
Hundred  
Decoder  
Resistor  
Array  
Transfer  
Gates  
Device  
(CS)  
Select  
VL/RL  
2
1
0
Store and  
Recall  
Control  
Circuitry  
VSS (Ground)  
VCC  
GND  
General  
RL/VL  
RW/VW  
Detailed  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.  
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved  
All other trademarks mentioned are the property of their respective owners.  
1

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