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5962F9672601VXC PDF预览

5962F9672601VXC

更新时间: 2024-01-04 11:39:00
品牌 Logo 应用领域
英特矽尔 - INTERSIL 驱动器逻辑集成电路输出元件
页数 文件大小 规格书
3页 69K
描述
Radiation Hardened Octal Three-State Buffer/Line Driver

5962F9672601VXC 技术参数

生命周期:Obsolete零件包装代码:DFP
包装说明:DFP,针数:20
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.6Is Samacsys:N
其他特性:WITH DUAL OUTPUT ENABLE系列:ACT
JESD-30 代码:R-CDFP-F20JESD-609代码:e4
逻辑集成电路类型:BUS DRIVER位数:8
功能数量:1端口数量:2
端子数量:20最高工作温度:125 °C
最低工作温度:-55 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:CERAMIC, METAL-SEALED COFIRED
封装代码:DFP封装形状:RECTANGULAR
封装形式:FLATPACK认证状态:Not Qualified
座面最大高度:2.92 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:GOLD
端子形式:FLAT端子节距:1.27 mm
端子位置:DUAL总剂量:300k Rad(Si) V
宽度:6.92 mmBase Number Matches:1

5962F9672601VXC 数据手册

 浏览型号5962F9672601VXC的Datasheet PDF文件第2页浏览型号5962F9672601VXC的Datasheet PDF文件第3页 
ACTS541MS  
Radiation Hardened Octal  
Three-State Buffer/Line Driver  
January 1996  
Features  
Pinouts  
20 LEAD CERAMIC DUAL-IN-LINE  
MIL-STD-1835 DESIGNATOR,  
• Devices QML Qualified in Accordance with MIL-PRF-38535  
• Detailed Electrical and Screening Requirements are Contained in  
SMD# 5962-96726 and Intersil’s QM Plan  
CDIP2-T20, LEAD FINISH C  
TOP VIEW  
• 1.25 Micron Radiation Hardened SOS CMOS  
1
2
3
4
5
6
7
8
9
VCC  
OE2  
OE1  
A0  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
20  
19  
• Total Dose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >300K RAD (Si)  
• Single Event Upset (SEU) Immunity: <1 x 10-10 Errors/Bit/Day  
(Typ)  
18 Y0  
17 Y1  
16 Y2  
15 Y3  
14 Y4  
13 Y5  
• SEU LET Threshold . . . . . . . . . . . . . . . . . . . . . . . >100 MEV-cm2/mg  
• Dose Rate Upset . . . . . . . . . . . . . . . . >1011 RAD (Si)/s, 20ns Pulse  
• Dose Rate Survivability. . . . . . . . . . . >1012 RAD (Si)/s, 20ns Pulse  
• Latch-Up Free Under Any Conditions  
• Military Temperature Range . . . . . . . . . . . . . . . . . . -55oC to +125oC  
• Significant Power Reduction Compared to ALSTTL Logic  
• DC Operating Voltage Range . . . . . . . . . . . . . . . . . . . . 4.5V to 5.5V  
• Input Logic Levels  
12  
Y6  
GND 10  
11 Y7  
- VIL = 0.8V Max  
- VIH = VCC/2 Min  
20 LEAD CERAMIC FLATPACK  
MIL-STD-1835 DESIGNATOR,  
CDFP4-F20, LEAD FINISH C  
TOP VIEW  
• Input Current 1µA at VOL, VOH  
• Fast Propagation Delay . . . . . . . . . . . . . . . . 21ns (Max), 14ns (Typ)  
Description  
VCC  
OE2  
Y0  
OE1  
A0  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
The Intersil ACTS541MS is a Radiation Hardened Octal Buffer/Line  
Driver, with three-state outputs. The output enable pins OE1, OE2  
control the three-state outputs. If either enable is high the output will be  
in a high impedance state. For data output both enables must be low.  
A1  
Y1  
A2  
A3  
Y2  
A4  
Y3  
The ACTS541MS utilizes advanced CMOS/SOS technology to achieve  
high-speed operation. This device is a member of a radiation hardened,  
high-speed, CMOS/SOS Logic family.  
A5  
Y4  
A6  
Y5  
A7  
Y6  
Y7  
The ACTS541MS is supplied in a 20 lead Ceramic Flatpack (K suffix) or  
a Ceramic Dual-In-Line package (D suffix).  
GND  
Ordering Information  
PART NUMBER  
5962F9672601VRC  
5962F9672601VXC  
ACTS541D/Sample  
ACTS541K/Sample  
ACTS541HMSR  
TEMPERATURE RANGE  
SCREENING LEVEL  
PACKAGE  
o
o
-55 C to +125 C  
MIL-PRF-38535 Class V  
20 Lead SBDIP  
o
o
-55 C to +125 C  
MIL-PRF-38535 Class V  
20 Lead Ceramic Flatpack  
20 Lead SBDIP  
o
25 C  
Sample  
Sample  
Die  
o
25 C  
20 Lead Ceramic Flatpack  
Die  
o
25 C  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
Spec Number 518891  
File Number 4094  
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999  
1

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