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5962F9671901VRC PDF预览

5962F9671901VRC

更新时间: 2024-01-01 11:08:15
品牌 Logo 应用领域
英特矽尔 - INTERSIL 总线收发器逻辑集成电路
页数 文件大小 规格书
3页 79K
描述
Radiation Hardened Octal Non-Inverting Bidirectional Bus Transceiver

5962F9671901VRC 技术参数

生命周期:Obsolete零件包装代码:DFP
包装说明:DFP,针数:20
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.3系列:ACT
JESD-30 代码:R-CDFP-F20JESD-609代码:e4
逻辑集成电路类型:BUS TRANSCEIVER位数:8
功能数量:1端口数量:2
端子数量:20最高工作温度:125 °C
最低工作温度:-55 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:CERAMIC, METAL-SEALED COFIRED
封装代码:DFP封装形状:RECTANGULAR
封装形式:FLATPACK传播延迟(tpd):10 ns
认证状态:Not Qualified筛选级别:MIL-PRF-38535 Class V
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:GOLD端子形式:FLAT
端子位置:DUAL总剂量:300k Rad(Si) V

5962F9671901VRC 数据手册

 浏览型号5962F9671901VRC的Datasheet PDF文件第2页浏览型号5962F9671901VRC的Datasheet PDF文件第3页 
ACTS245MS  
Radiation Hardened Octal  
Non-Inverting Bidirectional Bus Transceiver  
January 1996  
Features  
Pinouts  
20 PIN CERAMIC DUAL-IN-LINE, MIL-STD-1835  
DESIGNATOR CDIP2-T20, LEAD FINISH C  
TOP VIEW  
• Devices QML Qualified in Accordance with MIL-PRF-38535  
• Detailed Electrical and Screening Requirements are Contained in  
SMD# 5962-96719 and Intersil’ QM Plan  
1
2
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
VCC  
OE  
B0  
B1  
B2  
B3  
B4  
B5  
DIR  
A0  
• 1.25 Micron Radiation Hardened SOS CMOS  
• Total Dose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >300K RAD (Si)  
3
A1  
• Single Event Upset (SEU) Immunity: <1 x 10-10 Errors/Bit/Day  
(Typ)  
4
A2  
5
A3  
• SEU LET Threshold . . . . . . . . . . . . . . . . . . . . . . . >100 MEV-cm2/mg  
• Dose Rate Upset . . . . . . . . . . . . . . . . >1011 RAD (Si)/s, 20ns Pulse  
• Dose Rate Survivability. . . . . . . . . . . >1012 RAD (Si)/s, 20ns Pulse  
• Latch-Up Free Under Any Conditions  
6
A4  
7
A5  
8
A6  
9
A7  
B6  
B7  
10  
GND  
• Military Temperature Range . . . . . . . . . . . . . . . . . . -55oC to +125oC  
• Significant Power Reduction Compared to ALSTTL Logic  
• DC Operating Voltage Range . . . . . . . . . . . . . . . . . . . . 4.5V to 5.5V  
20 PIN CERAMIC FLATPACK, MIL-STD-1835  
DESIGNATOR CDFP4-F20, LEAD FINISH C  
TOP VIEW  
• Input Logic Levels  
- VIL = 0.8V Max  
DIR  
A0  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
VCC  
OE  
B0  
B1  
B2  
B3  
B4  
B5  
- VIH = VCC/2 Min  
A1  
• Input Current 1µA at VOL, VOH  
A2  
A3  
• Fast Propagation Delay . . . . . . . . . . . . . . . . 18ns (Max), 12ns (Typ)  
A4  
A5  
Description  
A6  
The Intersil ACTS245MS is a Radiation Hardened octal non-inverting  
bidirectional bus transceiver intended for two-way asynchronous commu-  
nication between data busses.  
A7  
B6  
B7  
GND  
The ACTS245MS utilizes advanced CMOS/SOS technology to achieve  
high-speed operation. This device is a member of a radiation hardened,  
high-speed, CMOS/SOS Logic Family.  
The ACTS245MS is supplied in a 20 lead Ceramic Flatpack (K suffix) or  
a Dual-In-Line Ceramic Package (D suffix).  
Ordering Information  
PART NUMBER  
5962F9671901VRC  
5962F9671901VXC  
ACTS245D/Sample  
ACTS245K/Sample  
ACTS245HMSR  
TEMPERATURE RANGE  
SCREENING LEVEL  
MIL-PRF-38535 Class V  
MIL-PRF-38535 Class V  
Sample  
PACKAGE  
o
o
-55 C to +125 C  
20 Lead SBDIP  
o
o
-55 C to +125 C  
20 Lead Ceramic Flatpack  
20 Lead SBDIP  
o
25 C  
o
25 C  
Sample  
20 Lead Ceramic Flatpack  
Die  
o
25 C  
Die  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
Spec Number 518785  
File Number 3188.1  
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999  
1

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