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29109BRA PDF预览

29109BRA

更新时间: 2024-01-24 15:54:01
品牌 Logo 应用领域
英特矽尔 - INTERSIL 内存集成电路静态存储器
页数 文件大小 规格书
7页 45K
描述
16K x 1 Asynchronous CMOS Static RAM

29109BRA 技术参数

生命周期:Transferred零件包装代码:DIP
包装说明:,针数:20
Reach Compliance Code:unknownECCN代码:3A001.A.2.C
HTS代码:8542.32.00.41风险等级:5.72
最长访问时间:70 nsJESD-30 代码:R-GDIP-T20
内存密度:16384 bit内存集成电路类型:STANDARD SRAM
内存宽度:1功能数量:1
端子数量:20字数:16384 words
字数代码:16000工作模式:ASYNCHRONOUS
最高工作温度:125 °C最低工作温度:-55 °C
组织:16KX1封装主体材料:CERAMIC, GLASS-SEALED
封装形状:RECTANGULAR封装形式:IN-LINE
并行/串行:SERIAL认证状态:Not Qualified
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:MILITARY
端子形式:THROUGH-HOLE端子位置:DUAL

29109BRA 数据手册

 浏览型号29109BRA的Datasheet PDF文件第2页浏览型号29109BRA的Datasheet PDF文件第3页浏览型号29109BRA的Datasheet PDF文件第4页浏览型号29109BRA的Datasheet PDF文件第5页浏览型号29109BRA的Datasheet PDF文件第6页浏览型号29109BRA的Datasheet PDF文件第7页 
HM-65262  
16K x 1 Asynchronous  
CMOS Static RAM  
March 1997  
Features  
Description  
• Fast Access Time. . . . . . . . . . . . . . . . . . . . 70/85nsMax The HM-65262 is a CMOS 16384 x 1-bit Static Random  
Access Memory manufactured using the Intersil Advanced  
SAJI V process. The device utilizes asynchronous circuit  
design for fast cycle times and ease of use. The HM-65262  
• Low Standby Current. . . . . . . . . . . . . . . . . . . .50µA Max  
• Low Operating Current . . . . . . . . . . . . . . . . . 50mA Max  
• Data Retention at 2.0V. . . . . . . . . . . . . . . . . . .20µA Max  
• TTL Compatible Inputs and Outputs  
• JEDEC Approved Pinout  
is available in both JEDEC standard 20 pin, 0.300 inch wide  
CERDIP and 20 pad CLCC packages, providing high board-  
level packing density. Gated inputs lower standby current,  
and also eliminate the need for pull-up or pull-down resis-  
tors.  
• No Clocks or Strobes Required  
• Temperature Range . . . . . . . . . . . . . . . +55oC to +125oC  
The HM-65262, a full CMOS RAM, utilizes an array of six  
transistor (6T) memory cells for the most stable and lowest  
possible standby supply current over the full military temper-  
ature range. In addition to this, the high stability of the 6T  
RAM cell provides excellent protection against soft errors  
due to noise and alpha particles. This stability also improves  
the radiation tolerance of the RAM over that of four transistor  
(4T) devices.  
• Equal Cycle and Access Time  
• Single 5V Supply  
• Gated Inputs-No Pull-Up or Pull-Down Resistors  
Required  
Ordering Information  
(NOTE 1)  
PACKAGE  
CERDIP  
TEMP. RANGE  
70ns/20µA (NOTE 1) 85ns/20µA (NOTE 1)  
85ns/400µA  
PKG. NO.  
o
o
-40 C to +85 C  
HM1-65262B-9  
29109BRA  
HM1-65262-9  
29103BRA  
-
-
-
-
F20.3  
F20.3  
F20.3  
J20.C  
o
o
JAN #  
SMD#  
-55 C to +125 C  
o
o
-55 C to +125 C  
8413203RA  
8413203YA  
8413201RA  
8413201YA  
o
o
CLCC (SMD#)  
NOTE:  
-55 C to +125 C  
1. Access Time/Data Retention Supply Current.  
Pinouts  
HM-65262 (CERDIP)  
HM-65262 (CLCC)  
TOP VIEW  
TOP VIEW  
1
2
3
4
5
6
7
8
9
V
20  
19  
A0  
A1  
A2  
A3  
A4  
A5  
A6  
Q
CC  
2
1 20 19  
A0 - A13  
Address Input  
A13  
18  
A2  
A3  
A4  
A5  
A6  
Q
A12  
3
4
5
6
7
8
18 A12  
17 A11  
16 A10  
15 A9  
14 A8  
13 A7  
E
Q
D
Chip Enable/Power Down  
Data Out  
17 A11  
A10  
A9  
16  
15  
14  
13  
Data In  
A8  
A7  
V
/GND Ground  
SS  
9
10 11 12  
V
Power (+5)  
Write Enable  
CC  
12  
D
W
GND 10  
11 E  
W
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
File Number 3002.2  
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 19996-1  

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