87C196LB

更新时间： 2024-01-29 06:57:08

品牌	Logo	应用领域
英特尔 - INTEL		微控制器
页数	文件大小	规格书
19页	431K
描述
CHMOS 16-BIT MICROCONTROLLER

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87C196LB 技术参数

生命周期：	Obsolete	零件包装代码：	LCC
包装说明：	QCCJ,	针数：	68
Reach Compliance Code：	unknown	HTS代码：	8542.31.00.01
风险等级：	5.83	具有ADC：	YES
地址总线宽度：	16	位大小：	16
最大时钟频率：	16 MHz	DAC 通道：	NO
DMA 通道：	NO	外部数据总线宽度：	16
JESD-30 代码：	S-PQCC-J68	长度：	24.2316 mm
I/O 线路数量：	56	端子数量：	68
最高工作温度：	125 °C	最低工作温度：	-40 °C
PWM 通道：	YES	封装主体材料：	PLASTIC/EPOXY
封装代码：	QCCJ	封装形状：	SQUARE
封装形式：	CHIP CARRIER	认证状态：	Not Qualified
ROM可编程性：	OTPROM	座面最大高度：	4.83 mm
速度：	16 MHz	最大供电电压：	5.5 V
最小供电电压：	4.5 V	标称供电电压：	5 V
表面贴装：	YES	技术：	CMOS
温度等级：	AUTOMOTIVE	端子形式：	J BEND
端子节距：	1.27 mm	端子位置：	QUAD
宽度：	24.2316 mm	uPs/uCs/外围集成电路类型：	MICROCONTROLLER

87C196LB 数据手册

PRODUCT PREVIEW

87C196LB

CHMOS 16-BIT MICROCONTROLLER

Automotive

■ 20 MHz operation^†

■ Full-duplex serial I/O port with

dedicated baud-rate generator

■ 24 Kbytes of on-chip OTPROM

■ 768 bytes of on-chip register RAM

■ Register-to-register architecture

■ Enhanced full-duplex, synchronous

serial I/O port (SSIO)

■ Programmable 8- or 16-bit external bus

■ Peripheral transaction server (PTS)

with high-speed, microcoded interrupt

service routines

■ Optional clock doubler with

programmable clock output signal

■ SFR register that indicates the source

■ Integrated, industry-standard J1850

of the last reset

communication protocol

■ Design enhancements for EMI

■ Six-channel/10-bit A/D with sample and

reduction

hold

■ Oscillator failure detection circuitry

■ Watchdog timer (WDT)

■ High-speed event processor array

— Six capture/compare channels

— Two compare-only channels

— Two 16-bit software timers

■ –40° C to +125° C ambient temperature

■ 52-pin PLCC package

†

16 MHz standard; 20 MHz is speed premium

NOTE

This datasheet contains information on products in the design phase of development. The

specifications are subject to change without notice. Verify with your local Intel sales office

that you have the latest datasheet before finalizing a design.

The 87C196LB is a high-performance 16-bit microcontroller with integrated support for the J1850 communication

protocol. The 87C196LB is composed of

a high-speed core with the following peripherals: an

asynchronous/synchronous serial I/O port (8096 compatible) with a dedicated 16-bit baud-rate generator; an

additional synchronous serial I/O port with full duplex master/slave transceivers; a six-channel A/D converter with

sample and hold; a flexible timer/counter structure with prescaler, cascading, and quadrature capabilities; six

modularized, multiplexed high-speed I/O for capture and compare (called event processor array) with 200 ns

resolution and double buffered inputs; and a sophisticated prioritized interrupt structure with programmable

peripheral transaction server (PTS). The clock doubler circuitry and oscillator output signal enable a 4 MHz

resonator to achieve the same internal clock speed as a more costly 8 MHz resonator in previous applications.

This same circuitry can drive other devices where a separate resonator was required in the past. Another cost-

savings feature is the fact that the I/O ports are driven low at reset, avoiding the need for pull-up resistors.

Intel Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in an Intel product. No other circuit patent

licenses are implied. Information contained herein supersedes previously published specifications on these devices from Intel.

February 1996

Order Number: 272807-000

12 3 4 5 6 7...19

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