28F008SA-L
8-MBIT (1 MBIT x 8) FLASHFILETM MEMORY
Y
Y
High-Density Symmetrically-Blocked
Architecture
Ð Sixteen 64-Kbyte Blocks
High-Performance Read
Ð 200 ns Maximum Access Time
Y
Deep Power-Down Mode
Typical
CC
Y
Y
Low-Voltage Operation
Ð 0.20 mA I
b
g g
3.3V 0.3V or 5.0V 10% V
CC
Ð
Y
Y
SRAM-Compatible Write Interface
Extended Cycling Capability
Ð 10,000 Block Erase Cycles
Ð 160,000 Block Erase
Cycles per Chip
Hardware Data Protection Feature
Ð Erase/Write Lockout during Power
Transitions
Y
Y
Industry Standard Packaging
Ð 40-Lead TSOP, 44-Lead PSOP
Y
Y
Automated Byte Write and Block Erase
Ð Command User Interface
Ð Status Register
ETOXTM III Nonvolatile Flash
Technology
Ð 12V Byte Write/Block Erase
System Performance Enhancements
Ý
Ð RY/BY Status Output
Ð Erase Suspend Capability
Intel’s 28F008SA-L 8 Mbit FlashFileTM Memory is the highest density nonvolatile read/write solution for solid-
state storage. The 28F008SA-L’s extended cycling, symmetrically-blocked architecture, fast access time, write
automation and very low power consumption provide a more reliable, lower power, lighter weight and higher
performance alternative to traditional rotating disk technology. The 28F008SA-L brings new capabilities to
portable computing. Application and operating system software stored in resident flash memory arrays provide
instant-on, rapid execute-in-place and protection from obsolescence through in-system software updates.
Resident software also extends system battery life and increases reliability by reducing disk drive accesses.
For high-density data acquisition applications, the 28F008SA-L offers a more cost-effective and reliable alter-
native to SRAM and battery. Traditional high-density embedded applications, such as telecommunications,
can take advantage of the 28F008SA-L’s nonvolatility, blocking and minimal system code requirements for
flexible firmware and modular software designs.
The 28F008SA-L is offered in 40-lead TSOP (standard and reverse) and 44-lead PSOP packages. Pin assign-
ments simplify board layout when integrating multiple devices in a flash memory array or subsystem. This
device uses an integrated Command User Interface and state machine for simplified block erasure and byte
write. The 28F008SA-L memory map consists of 16 separately erasable 64-Kbyte blocks.
Intel’s 28F008SA-L employs advanced CMOS circuitry for systems requiring low power consumption and
noise immunity. Its 200 ns access time provides superior performance when compared with magnetic storage
media. A deep power-down mode lowers power consumption to 0.66 mW typical thru V , crucial in portable
CC
computing, handheld instrumentation and other low-power applications. The RP power control input also
provides absolute data protection during system power-up/down.
Ý
Manufactured on Intel’s 0.8 micron ETOX process, the 28F008SA-L provides the highest levels of quality,
reliability and cost-effectiveness.
*Other brands and names are property of their respective owners.
*Other brands and names are the property of their respective owners.
Information in this document is provided in connection with Intel products. Intel assumes no liability whatsoever, including infringement of any patent or
copyright, for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for such products. Intel retains the right to make
changes to these specifications at any time, without notice. Microcomputer Products may have minor variations to this specification known as errata.
©
COPYRIGHT INTEL CORPORATION, 1995
December 1995
Order Number: 290435-005
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