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IN74HC4046AN PDF预览

IN74HC4046AN

更新时间: 2024-02-23 06:45:59
品牌 Logo 应用领域
INTEGRAL 信号电路锁相环或频率合成电路
页数 文件大小 规格书
11页 242K
描述
PHASE-LOCKED LOOP

IN74HC4046AN 技术参数

生命周期:Contact Manufacturer包装说明:,
Reach Compliance Code:unknown风险等级:5.72
Is Samacsys:NBase Number Matches:1

IN74HC4046AN 数据手册

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IN74HC4046A  
PHASE-LOCKED LOOP  
High-Performance Silicon-Gate CMOS  
The device inputs are compatible with standard CMOS outputs; with  
pullup resistors, they are compatible with LS/ALSTTL outputs.  
The IN74HC4046A phase-locked loop contains three phase  
comparators, a voltage-controlled oscillator (VCO) and unity gain op-  
amp DEMOUT. The comparators have two common signal inputs,  
COMPIN, and SIGIN. Input SIGIN and COMPIN can be used directly  
coupled to large voltage signals, or indirectly coupled (with a series  
capacitor to small voltage signals). The self-bias circuit adjusts small  
voltage signals in the linear region of the amplifier. Phase comparator 1  
(an exclusive OR gate) provides a digital error signal PC1OUT and  
maintains 90 degrees phase shift at the center frequency between  
ORDERING INFORMATION  
SIGIN and COMPIN signals (both at 50% duty cycle). Phase comparator  
2 (with leading-edge sensing logic) provides digital error signals  
PC2OUT and PCPOUT and maintains a 0 degree phase shift between  
SIGIN and COMPIN signals (duty cycle is immaterial). The linear VCO  
produces an output signal VCOOUT whose frequency is determined by  
the voltage of input VCOIN signal and the capacitor and resistors  
connected to pins C1A, C1B, R1 and R2. The unity gain op-amp  
output DEMOUT with an external resistor is used where the VCOIN  
signal is needed but no loading can be tolerated. The inhibit  
input, when high, disables the VCO and all on-amps to minimize  
standby power consumption.  
IN74HC4046AN Plastic  
IN74HC4046AD SOIC  
TA = -55° to 125° C for all  
packages  
PIN ASSIGNMENT  
Applications include FM and FSK modulation and  
demodulation, frequency synthesis and multiplication, frequency  
discrimination, tone decoding, data synchronization and  
conditioning, voltage-to-frequency conversion and motor speed  
control.  
Low Power Consumption Characteristic of CMOS Device  
Operating Speeds Similary to LS/ALSTTL  
Wide Operating Voltage Range: 3.0 to 6.0 V  
Low Input Current: 1.0 µA Maximum (except SIGIN and COMPIN)  
Low Quiescent Current: 80 µA Maximum (VCO disabled)  
High Noise Immunity Characteristic of CMOS Devices  
Diode Protection on all Inputs  
Pin No.  
Symbol  
PCPOUT  
PC1OUT  
COMPIN  
VCOOUT  
INH  
Name and Function  
Phase Comparator Pulse Output  
Phase Comparator 1 Output  
Comparator Input  
1
2
3
4
VCO Output  
5
Inhibit Input  
6
C1A  
Capacitor C1 Connection A  
Capacitor C1 Connection B  
Ground (0 V) VSS  
7
C1B  
8
GND  
9
VCOIN  
DEMOUT  
R1  
VCO Input  
10  
11  
12  
13  
14  
15  
16  
Demodulator Output  
Resistor R1 Connection  
Resistor R2 Connection  
Phase Comparator 2 Output  
Signal Input  
R2  
PC2OUT  
SIGIN  
PC3OUT  
VCC  
Phase Comparator 3 Output  
Positive Supply Voltage  
tector 2. For instance,  
a
signal??2 ti  
1

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