Datasheet > IN74AC74D

IN74AC74D

更新时间： 2024-11-05 05:39:19

品牌	Logo	应用领域
IKSEMICON		触发器栅
页数	文件大小	规格书
6页	235K
描述
Dual D Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS

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IN74AC74D 数据手册

TECHNICAL DATA

IN74AC74

Dual D Flip-Flop with Set and Reset

High-Speed Silicon-Gate CMOS

The IN74AC74 is identical in pinout to the LS/ALS74, HC/HCT74.

The device inputs are compatible with standard CMOS outputs; with

pullup resistors, they are compatible with LS/ALS outputs.

This device consists of two D flip-flops with individual Set, Reset,

and Clock inputs. Information at a D-input is transferred to the

corresponding Q output on the next positive going edge of the clock input.

Both Q and Q outputs are available from each flip-flop. The Set and Reset

inputs are asynchronous.

ORDERING INFORMATION

IN74AC74N Plastic

IN74AC74D SOIC

T_A= -40° to 85° C for all packages

•

Outputs Directly Interface to CMOS, NMOS, and TTL

Operating Voltage Range: 2.0 to 6.0 V

Low Input Current: 1.0 μA; 0.1 μA @ 25°C

High Noise Immunity Characteristic of CMOS Devices

Outputs Source/Sink 24 mA

PIN ASSIGNMENT

LOGIC DIAGRAM

FUNCTION TABLE

Inputs

Clock

Outputs

Set

Reset

Data

H^*

No Change

PIN 14 =V_CC

PIN 7 = GND

*Both outputs will remain high as long as Set

and Reset are low, but the output states are

unpredictable if Set and Reset go high

simultaneously.

X = don’t care

Rev. 00

12 3 4 5 6

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