IMI145151
FREQUENCY SYNTHESIZER
CMOS LSI
PARALLEL PROGRAMMED PLL FREQUENCY SYNTHESIZER
PRODUCT DESCRIPTION
PRODUCT FEATURES
The IMI145151 is a member of a family of phaselock loop synthesizer
ICs from International Microcircuits. The IMI145151 is an improved
version of the Motorola MC145151 and will provide a synthesizer with
noticeably improved performance.
>200 Mhz typical input frequency.
-163 dBc/Hz total phase noise floor.
No dead zone, by design.
The IMI145151 is programmed with parallel input data lines. Since it
does not require a microcontroller as serial and bus programmed units
do, the IMI145151 is an excellent choice for synthesizers requiring
independence from digital controllers. Such applications include fixed
local oscillator signals, whose tuning never changes, and signal sources,
which have few operating frequencies.
Unambiguous PLL acquisition.
Blocks in the IMI145151 include a programmable feedback divider, a
reference divider, phase detector, and charge pump. The reference
divider is programmed by three select lines to one of eight ROM
encoded values. Both counter inputs are biased for maximum sensitivity
to sinewave input signals. The reference divider input is also configured
to operate as a crystal oscillator if desired.
8 user-selectable reference divider ratios: 8, 128,
256, 512, 1024, 2048, 2410, 8192.
Lock detect signal.
The IMI145151 has a Type IV phase frequency detector which has
eliminated by the design the inherent dead zone which causes crossover
distortion at the critical center lock point. the IMI circuitry enables
consistent low noise loop designs using the simple single ended charge
pump output. Differential charge pump outputs are also provided for
those who require a more sophisticated differential active loop filter
design.
14 bit N counter. Divider range = 3 to 16383.
On- or off-chip reference oscillator operation.
3-volt and 5-volt characterizations.
Performance improvements are in the operating bandwidth and phase
detector noise floor. With its extremely low phase noise foor and wider
input bandwith, prescaler ratios can be minimized to allow wide loop
bandwidths for faster settling and lower phase noise.
BLOCK DIAGRAM
VDD = Pin 3
VSS = Pin 2
5
RA0
14x8 ROM Reference
6
7
RA1
RA2
Lock
Detect
28
Decoder
LD
27
26
14 bit /8 Counter
OSCin
OSCout
Phase
4
PDout
Detector A
1
14 bit /N Counter
Fin
9
PHIV
Phase
Detector B
8
Transmit Offset Adder
PHIR
21
T/R
10
fv
NOTE: N0 through N13 inputs have
pullup resistors not shown.
23
22
25
24
20
19
18
17
16
15
14
13
12
11
N1
N0
N13
N12 N11 N10
N9
N8
N7
N6
N5
N4
N3
N2
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST.
MILPITAS, CA 95035 TEL: 408-263-6300 ext. 276 FAX 408-263-6571
Rev 2.0
9/9/97
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