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IHLP5050CEEBR82M01

更新时间： 2024-11-06 10:48:47
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威世 - VISHAY /
页数 文件大小 规格书
5页 139K
描述
General Fixed Inductor, 1 ELEMENT, 0.82 uH, GENERAL PURPOSE INDUCTOR, SMD, ROHS COMPLIANT

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IHLP5050CEEBR82M01 数据手册

 浏览型号IHLP5050CEEBR82M01的Datasheet PDF文件第2页浏览型号IHLP5050CEEBR82M01的Datasheet PDF文件第3页浏览型号IHLP5050CEEBR82M01的Datasheet PDF文件第4页浏览型号IHLP5050CEEBR82M01的Datasheet PDF文件第5页 
IHLP-5050CE-01  
Vishay Dale  
Low Profile, High Current IHLP® Inductors  
FEATURES  
• Lowest height (3.5 mm) in this package footprint  
• Shielded construction  
• Frequency range up to 5.0 MHz  
• Lowest DCR/μH, in this package size  
• Handles high transient current spikes without  
saturation  
• Ultra low buzz noise, due to composite  
construction  
• Compliant to RoHS Directive 2002/95/EC  
Manufactured under one or more of the following:  
US Patents; 6,198,375/6,204,744/6,449,829/6,460,244.  
Several foreign patents, and other patents pending.  
APPLICATIONS  
STANDARD ELECTRICAL SPECIFICATIONS  
• PDA/notebook/desktop/server applications  
• High current POL converters  
L0  
HEAT  
INDUCTANCE  
DCR DCR  
RATING SATURATION  
• Low profile, high current power supplies  
• Battery powered devices  
• DC/DC converters in distributed power systems  
• DC/DC converter for Field Programmable Gate Array (FPGA)  
20 % AT 100 kHz, TYP. MAX. CURRENT  
0.25 V, 0 A  
(μH)  
CURRENT  
DC TYP.  
(A) (4)  
25 °C 25 °C DC TYP.  
(m) (m)  
(A) (3)  
43  
0.10  
0.15  
0.22  
0.33  
0.47  
0.60  
0.68  
0.82  
1.0  
0.8  
1
0.96  
1.2  
1.3  
1.5  
2
2.2  
2.5  
3
84  
75  
65  
62  
55  
51  
49  
44  
40  
35  
30  
29  
27  
24  
19  
18  
16  
14  
41  
DIMENSIONS in inches [millimeters]  
1.1  
1.3  
1.6  
1.8  
2.3  
2.6  
3.3  
5.1  
6.5  
7.2  
11  
38.5  
36.5  
32  
29  
28  
Typical Pad Layout  
0.508  
[12.9ꢀ  
Max.  
0.542  
[13.76ꢀ  
0.195  
[4.95ꢀ  
0.138  
[3.5ꢀ Max.  
25  
24  
0.091 0.01  
[2.3 0.3ꢀ  
0.310  
[7.87ꢀ  
3.5  
5.5  
7
1.5  
19  
1.8  
2.2  
16.5  
16  
8
0.185 0.01  
[4.7 0.3ꢀ  
3.3  
4.7  
5.6  
6.8  
8.2  
10  
12  
15  
19  
22  
28  
34  
12  
10  
9.5  
9
8.5  
7
0.520 0.015  
[13.2 0.38ꢀ Max.  
14.3  
18.3  
19.8  
24.8  
30.4  
This diagram applies to values 0.6 µH and below  
Typical Pad Layout  
0.508  
[12.9ꢀ  
Max.  
0.542  
[13.8ꢀ  
Notes  
0.138  
[3.5ꢀ Max.  
0.128 [3.3ꢀ  
(1)  
(2)  
(3)  
(4)  
(5)  
0.087 0.01  
All test data is referenced to 25 °C ambient  
0.318  
[8.1ꢀ  
[2.2 0.254ꢀ  
Operating temperature range - 55 °C to + 125 °C  
DC current (A) that will cause an approximate T of 40 °C  
DC current (A) that will cause L0 to drop approximately 20 %  
The part temperature (ambient + temp. rise) should not exceed  
125 °C under worst case operating conditions. Circuit design,  
component placement, PWB trace size and thickness, airflow  
and other cooling provisions all affect the part temperature. Part  
temperature should be verified in the end application.  
0.118 0.01  
[3.0 0.3ꢀ  
0.520 0.015  
[13.2 0.38ꢀ  
This diagram applies to values 0.68 µH and above  
DESCRIPTION  
IHLP-5050CE-01  
MODEL  
1.0 μH  
20 %  
ER  
e3  
INDUCTANCE VALUE  
INDUCTANCE TOLERANCE  
PACKAGE CODE  
JEDEC LEAD (Pb)-FREE STANDARD  
GLOBAL PART NUMBER  
I
H
L
P
5
0
5
0
C
E
E
R
1
R
0
M
0
1
PRODUCT FAMILY  
SIZE  
PACKAGE  
CODE  
INDUCTANCE  
VALUE  
TOL.  
SERIES  
** Please see document “Vishay Material Category Policy”: www.vishay.com/doc?99902  
Document Number: 34105  
Revision: 24-Feb-11  
For technical questions, contact: magnetics@vishay.com  
www.vishay.com  
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