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IDTQS74FCT2257TS18 PDF预览

IDTQS74FCT2257TS18

更新时间: 2024-11-21 20:10:07
品牌 Logo 应用领域
艾迪悌 - IDT 光电二极管逻辑集成电路
页数 文件大小 规格书
6页 65K
描述
Multiplexer, FCT Series, 4-Func, 2 Line Input, 1 Line Output, True Output, CMOS, PDSO16, SOIC-16

IDTQS74FCT2257TS18 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP16,.25
针数:16Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.92
系列:FCTJESD-30 代码:R-PDSO-G16
JESD-609代码:e0长度:9.9 mm
负载电容(CL):50 pF逻辑集成电路类型:MULTIPLEXER
最大I(ol):0.012 A湿度敏感等级:1
功能数量:4输入次数:2
输出次数:1端子数量:16
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE WITH SERIES RESISTOR输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
电源:5 VProp。Delay @ Nom-Sup:6 ns
传播延迟(tpd):6 ns认证状态:Not Qualified
座面最大高度:1.75 mm子类别:Multiplexer/Demultiplexers
最大供电电压 (Vsup):5.25 V最小供电电压 (Vsup):4.75 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn85Pb15)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
宽度:3.9 mmBase Number Matches:1

IDTQS74FCT2257TS18 数据手册

 浏览型号IDTQS74FCT2257TS18的Datasheet PDF文件第2页浏览型号IDTQS74FCT2257TS18的Datasheet PDF文件第3页浏览型号IDTQS74FCT2257TS18的Datasheet PDF文件第4页浏览型号IDTQS74FCT2257TS18的Datasheet PDF文件第5页浏览型号IDTQS74FCT2257TS18的Datasheet PDF文件第6页 
HIGH-SPEED CMOS  
IDTQS74FCT2257T/AT/CT  
QUAD 2-INPUT  
MULTIPLEXER  
DESCRIPTION:  
FEATURES:  
The IDTQS74FCT2257T is a high-speed CMOS TTL-compatible,  
quad, 2-input multiplexer with a 25resistor output, useful for driving  
transmissionlinesandreducingsystemnoise. Allinputshaveclampdiodes  
for undershoot noise suppression. All outputs have ground bounce  
suppression. OutputswillnotloadanactivebuswhenVccisremovedfrom  
the device.  
• CMOS power levels: <7.5mW static  
• Undershoot clamp diodes on all inputs  
• True TTL input and output compatibility  
• Ground bounce controlled outputs  
• Reduced output swing of 0 to 3.5V  
• Built-in 25series resistor outputs reduce reflection and other  
system noise  
• Std., A, and C speed grades with 4.3ns for C  
• IOL = 12mA  
• Available in SOIC, QSOP, and S1 packages  
FUNCTIONALBLOCKDIAGRAM  
S
OE  
I0A  
I1A  
I0B  
I1B  
I0C  
I1C  
I0D  
I1D  
15  
1
2
3
5
6
11  
10  
14  
13  
25  
25Ω  
25Ω  
25Ω  
4
7
9
12  
YA  
YB  
YC  
YD  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
INDUSTRIAL TEMPERATURE RANGE  
MARCH 2001  
1
© 2001 Integrated Device Technology, Inc.  
DSC-5402/3  

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