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IDTQS3L384Q PDF预览

IDTQS3L384Q

更新时间: 2024-11-25 21:55:07
品牌 Logo 应用领域
艾迪悌 - IDT 开关
页数 文件大小 规格书
5页 51K
描述
QUICKSWITCH PRODUCTS HIGH-SPEED LOW POWER CMOS 10-BIT BUS EXCHANGE SWITCH

IDTQS3L384Q 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SSOP, SSOP24,.24
针数:24Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:7.22
系列:3LJESD-30 代码:R-PDSO-G24
JESD-609代码:e0长度:8.6614 mm
逻辑集成电路类型:BUS DRIVER湿度敏感等级:1
位数:10功能数量:1
端口数量:2端子数量:24
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装等效代码:SSOP24,.24封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH峰值回流温度(摄氏度):225
电源:5 V传播延迟(tpd):0.25 ns
认证状态:Not Qualified座面最大高度:1.7272 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):5.25 V
最小供电电压 (Vsup):4.75 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn85Pb15)
端子形式:GULL WING端子节距:0.635 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:3.9116 mm

IDTQS3L384Q 数据手册

 浏览型号IDTQS3L384Q的Datasheet PDF文件第2页浏览型号IDTQS3L384Q的Datasheet PDF文件第3页浏览型号IDTQS3L384Q的Datasheet PDF文件第4页浏览型号IDTQS3L384Q的Datasheet PDF文件第5页 
QUICKSWITCH® PRODUCTS  
IDTQS3L384  
HIGH-SPEED LOW POWER CMOS  
10-BIT BUS EXCHANGE SWITCH  
FEATURES:  
DESCRIPTION:  
• Enhanced N channel FET with no inherent diode to Vcc  
• 5bidirectional switches connect inputs to outputs  
• Zero propagation delay, zero added ground bounce  
• Ultra low power with 0.2µA typical Icc  
The QS3L384 provides a set of ten high-speed CMOS TTL-compatible  
bus switches. The low ON resistance of the QS3L384 allows inputs to be  
connectedtooutputswithoutaddingpropagationdelayandwithoutgener-  
atingadditionalgroundbouncenoise.TheBusEnable(BE)signalsturnthe  
switcheson.Twobusenablesignalsareprovided,oneforeachoftheupper  
and lower five bits of the two 10-bit buses.  
• Undershoot clamp diodes on all switch and control inputs  
• Two enables control five bits each  
• Available in SOIC, QSOP, and TSSOP packages  
The QS3L384 is characterized for operation at -40°C to +85°C.  
APPLICATIONS:  
• Hot-swapping, hot-docking  
• Voltage translation (5V to 3.3V)  
• Power Conservation  
• Capacitance reduction and isloation  
• Bus Isolation  
• Clock Gating  
FUNCTIONALBLOCKDIAGRAM  
A0  
B0  
A4  
A5  
B4  
B5  
A9  
B5  
BEA  
BEB  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
INDUSTRIAL TEMPERATURE RANGE  
FEBRUARY 2000  
1
c
2000 Integrated Device Technology, Inc.  
DSC-5772/2  

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