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IDTCV141PA PDF预览

IDTCV141PA

更新时间: 2024-11-17 01:19:15
品牌 Logo 应用领域
艾迪悌 - IDT 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
10页 87K
描述
1-TO-8 DIFFERENTIAL CLOCK BUFFER

IDTCV141PA 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP-48
针数:48Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.91
系列:CV141输入调节:DIFFERENTIAL MUX
JESD-30 代码:R-PDSO-G48JESD-609代码:e0
长度:12.5 mm逻辑集成电路类型:PLL BASED CLOCK DRIVER
湿度敏感等级:1功能数量:1
反相输出次数:端子数量:48
实输出次数:8最高工作温度:70 °C
最低工作温度:输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP48,.3,20封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):240
电源:3.3 VProp。Delay @ Nom-Sup:0.25 ns
传播延迟(tpd):4.5 ns认证状态:Not Qualified
Same Edge Skew-Max(tskwd):0.25 ns座面最大高度:1.1 mm
子类别:Clock Drivers最大供电电压 (Vsup):3.465 V
最小供电电压 (Vsup):3.135 V标称供电电压 (Vsup):3.3 V
表面贴装:YES温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn85Pb15)端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:6.1 mm
Base Number Matches:1

IDTCV141PA 数据手册

 浏览型号IDTCV141PA的Datasheet PDF文件第2页浏览型号IDTCV141PA的Datasheet PDF文件第3页浏览型号IDTCV141PA的Datasheet PDF文件第4页浏览型号IDTCV141PA的Datasheet PDF文件第5页浏览型号IDTCV141PA的Datasheet PDF文件第6页浏览型号IDTCV141PA的Datasheet PDF文件第7页 
1-TO-8 DIFFERENTIAL  
CLOCK BUFFER  
IDTCV141  
DESCRIPTION:  
FEATURES:  
TheCV141differentialbufferiscompliantwithIntelDB800specifications. It  
isintendedtodistributetheSRC(serialreferenceclock)asacompanionchip  
tothe mainclockofthe CK409,CK410/CK410M,CK410B,etc. PLLis offin  
bypass modeandhas noclockdetect.  
• Compliant with Intel DB800 spec  
• Eight differential clock pairs at 0.7V  
• 50ps skew  
• 50ps cycle-to-cycle jitter  
• Programmable Bandwidth  
• PLL bypass configurable  
Divide by 2 programmable  
Available in SSOP and TSSOP packages  
FUNCTIONALBLOCKDIAGRAM  
OE_INV  
DIF_0  
(1)OE[7:0]  
DIF_0#  
Output  
(1)SRC_STOP  
(1)PWRDWN  
Control  
DIF_1  
DIF_1#  
DIF_2  
DIF_2#  
SCL  
SDA  
SM Bus  
Controller  
DIF_3  
Output  
Buffer  
DIF_3#  
DIF_4  
SRC_DIV2#  
DIF_4#  
DIF_5  
PLL/BYPASS#  
DIF_5#  
SRC_IN  
DIF_6  
SRC_IN#  
DIF_6#  
DIV  
DIF_7  
HIGH_BW#  
PLL  
DIF_7#  
LOCK  
NOTE:  
1. See OE_INV table for active HIGH or active LOW.  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
COMMERCIAL TEMPERATURE RANGE  
OCTOBER 2005  
1
© 2005 Integrated Device Technology, Inc.  
DSC 6738/19  

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