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IDT77V222L155PGI9 PDF预览

IDT77V222L155PGI9

更新时间: 2024-02-26 23:51:00
品牌 Logo 应用领域
艾迪悌 - IDT ATM异步传输模式电信电信集成电路
页数 文件大小 规格书
24页 187K
描述
ATM Segmentation and Reassembly Device, 1-Func, CMOS, PQFP208, PLASTIC, QFP-208

IDT77V222L155PGI9 技术参数

生命周期:Obsolete零件包装代码:QFP
包装说明:FQFP,针数:208
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.84JESD-30 代码:S-PQFP-G208
JESD-609代码:e0长度:28 mm
功能数量:1端子数量:208
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:FQFP
封装形状:SQUARE封装形式:FLATPACK, FINE PITCH
认证状态:Not Qualified座面最大高度:3.86 mm
标称供电电压:3.3 V表面贴装:YES
技术:CMOS电信集成电路类型:ATM/SONET/SDH SEGMENTATION AND REASSEMBLY DEVICE
温度等级:INDUSTRIAL端子面层:TIN LEAD
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD宽度:28 mm
Base Number Matches:1

IDT77V222L155PGI9 数据手册

 浏览型号IDT77V222L155PGI9的Datasheet PDF文件第2页浏览型号IDT77V222L155PGI9的Datasheet PDF文件第3页浏览型号IDT77V222L155PGI9的Datasheet PDF文件第4页浏览型号IDT77V222L155PGI9的Datasheet PDF文件第5页浏览型号IDT77V222L155PGI9的Datasheet PDF文件第6页浏览型号IDT77V222L155PGI9的Datasheet PDF文件第7页 
3.3V 155 Mbps ATM SAR CONTROLLER  
IDT77V222  
WITH ABR SUPPORT FOR PCI-BASED  
NETWORKINGAPPLICATIONS  
Integrated Device Technology, Inc.  
KEY FEATURES  
• Full-duplex Segmentation and Reassembly (SAR) at  
155Mbps"wire-speed"(310Mbpsaggregatespeed)  
• Operates with ATM Networks up to 155.52 Mbps  
• Stand-alone Controller: Embedded Processor not required  
• Performs ATM Layer Protocol Functions  
• Supports AAL5, AAL3/4, AAL0 and Raw Cell Formats  
• Supports Constant Bit Rate (CBR), Variable Bit Rate  
(VBR), and Unassigned Bit Rate (UBR), and Available Bit  
Rate (ABR) Service Classes  
• Null Cell Disable Option During Transmit  
• RM Cell Handling  
• Option to Select ITU or ATM Null Cell Format  
• NAND, Scan, and Output Test Modes  
• UTOPIA Level 1 Interface to PHY  
• Utility Bus Interface for PHY Management  
• Serial EEPROM Interface  
• EPROM Interface  
• PCI 2.1 Compliant  
• Segments and Reassembles CS-PDUs into Host Memory  
• Up to 256 Open Transmit Connections  
• Compact PCI R1.0 Hot Swap Friendly Compliant  
• UNI 3.1, TM 4.0 compliant  
• Up to 256 Smultaneous Receive Connections  
• ABR, VBR, UBR Selectable per VC Time-out  
• Automatic AAL5 Padding  
• Four Buffer Pools for Independent or Chained Reassembly  
• Buffer Management Options for MPEG Operation  
• Supports Any Buffer Alignment Condition  
• Free Bufffer Queues Mapped Into PCI Memory Space  
• Rx FIFO Size (Configurable to 1024 Kbytes)  
• Configurable Transmit FIFO Depth for Reduced Latency  
• Supports Big and Little Endian Data Transfers  
• UTOPIA Master/Slave mode  
• Meets PCI Bus Power Management and Interface Specifi-  
cation Revision 1.1  
• Pin Compatible with IDT 77211/77222 SAR  
• Software Compatible with the IDT 77222  
• Commercial and Industrial Temprature Ranges  
• 208-Lead PQFP Package (28 x 28mm)  
• Software Drivers:  
SARWIN2DemonstrationProgram  
NDISDriver  
Vx Works (3rd party)  
Linux(3rdparty)  
SYSTEM-LEVEL FUNCTIONAL BLOCK DIAGRAM  
16K x 32  
EPROM  
SRAM  
PCI BUS  
8
32  
Rx UTOPIA Bus  
8
2
155Mbps  
IDT77V222  
155Mbps  
PCI ATM  
ABR SAR  
33MHZ  
32  
Tx UTOPIA Bus  
PHY  
8
2
Utility Bus  
8
80.0MHZ OSC.  
EEPROM  
5351 drw 01  
NICStAR is a trademark and the IDT logo is a registered trademark of Integrated Device Technology, Inc.  
COMMERCIALANDINDUSTRIALTEMPERATURERANGE  
JANUARY2001  
©2001IntegratedDeviceTechnology,Inc.  
DSC-5351/8  
1

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