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IDT74LVCHR162245APF PDF预览

IDT74LVCHR162245APF

更新时间: 2024-02-25 08:00:45
品牌 Logo 应用领域
艾迪悌 - IDT 总线收发器输出元件
页数 文件大小 规格书
6页 104K
描述
3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3 STATE OUTPUTS, 5 VOLT TOLERANT I/O, BUS-HOLD

IDT74LVCHR162245APF 数据手册

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3.3V CMOS 16-BIT  
IDT74LVCHR162245A  
BUS TRANSCEIVER  
WITH 3 STATE OUTPUTS,  
5 VOLT TOLERANT I/O, BUS-HOLD  
DESCRIPTION:  
FEATURES:  
This 16-bit bus transceiver is built using advanced dual metal CMOS  
• Typical tSK(o) (Output Skew) < 250ps  
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using  
machine model (C = 200pF, R = 0)  
technology. Thishigh-speed, lowpowerdeviceisidealforasynchronous  
communication between two buses (A and B). The Direction and Output  
Enablecontrolsaredesignedtooperatethisdeviceaseithertwoindepen-  
dent8-bittransceiversorone16-bittransceiver. Thedirectioncontrolpin  
(DIR) controls the direction of data flow. The output enable pin (OE)  
overrides the direction control and disables both ports. All inputs are  
designed with hysteresis for improved noise margin.  
• VCC = 3.3V ± 0.3V, Normal Range  
• VCC = 2.7V to 3.6V, Extended Range  
• CMOS power levels (0.4µ W typ. static)  
• All inputs, outputs, and I/O are 5V tolerant  
• Supports hot insertion  
Allpinscanbedrivenfromeither3.3Vor5Vdevices. Thisfeatureallows  
the use of this device as a translator in a mixed 3.3V/5V supply system.  
TheLVCHR162245Ahasseriesresistorsinthedeviceoutputstructure  
which will significantly reduce line noise when used with light loads. The  
driver has been designed to drive ±12mA at the designated threshold  
levels.  
• Available in SSOP, TSSOP, and TVSOP packages  
DRIVE FEATURES:  
• Balanced Output Drivers: ±12mA  
• Low switching noise  
TheLVCHR162245Ahasbus-holdwhichretainstheinputs'laststate  
whenevertheinputgoestoahighimpedance. Thispreventsfloatinginputs  
and eliminates the need for pull-up/down resistors.  
APPLICATIONS:  
• 5V and 3.3V mixed voltage systems  
• Data communication and telecommunication systems  
FUNCTIONALBLOCKDIAGRAM  
24  
1
1DIR  
2DIR  
25  
48  
1OE  
1B1  
2OE  
36  
47  
1A1  
2A1  
2
13  
2B1  
35  
46  
1A2  
3
2A2  
14  
1B2  
1B3  
2B2  
33  
44  
1A3  
2A3  
16  
5
2B3  
32  
43  
1A4  
2A4  
6
17  
1B4  
1B5  
1B6  
2B4  
41  
30  
1A5  
2A5  
8
19  
2B5  
40  
29  
1A6  
2A6  
9
20  
2B6  
38  
27  
1A7  
2A7  
11  
22  
1B7  
1B8  
2B7  
26  
37  
1A8  
2A8  
23  
12  
2B8  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
INDUSTRIAL TEMPERATURE RANGE  
MARCH 1999  
1
© 1999 Integrated Device Technology, Inc.  
DSC-4598/2  

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