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IDT74LVCH374ASO8 PDF预览

IDT74LVCH374ASO8

更新时间: 2023-08-15 00:00:00
品牌 Logo 应用领域
艾迪悌 - IDT 光电二极管
页数 文件大小 规格书
6页 64K
描述
Bus Driver, LVC/LCX/Z Series, 1-Func, 8-Bit, True Output, CMOS, PDSO20, SOIC-20

IDT74LVCH374ASO8 数据手册

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3.3V CMOS OCTAL EDGE-  
TRIGGERED D-TYPE FLIP-FLOP  
IDT74LVCH374A  
WITH 3-STATE OUTPUTS, 5 VOLT  
TOLERANT I/O AND BUS-HOLD  
DESCRIPTION:  
FEATURES:  
0.5 MICRON CMOS Technology  
The LVCH374A octal edge triggered D-Type flip-flop is built using  
advanced dual metal CMOS technology. The device features 3-state  
outputsdesignedspecificallyfordrivinghighlycapacitiveorrelativelylow-  
impedanceloads.TheLVCH374Aisparticularlysuitableforimplementing  
buffer registers, input-output (I/O) ports, bidirectional bus drivers, and  
working registers.  
ESD > 2000V per MIL-STD-883, Method 3015;  
> 200V using machine model (C = 200pF, R = 0)  
1.27mm pitch SOIC, 0.65mm pitch SSOP,  
0.635mm pitch QSOP, 0.65mm pitch TSSOP packages  
Extended commercial range of – 40°C to +85°C  
VCC = 3.3V ±0.3V, Normal Range  
VCC = 2.3V to 3.6V, Extended Range  
Onthepositivetransitionoftheclock(CLK)input, theQoutputsareset  
to the logic levels set up at the data (D) inputs.  
CMOS power levels (0.4µW typ. static)  
Rail-to-Rail output swing for increased noise margin  
All inputs, outputs and I/O are 5 Volt tolerant  
Supports hot insertion  
A buffered output-enable (OE) input can be used to place the eight  
outputs in either a normal logic state (high or low logic levels) or a high-  
impedancestate.Inthehigh-impedancestate,theoutputsneitherloadnor  
drivethebuslinessignificantly.OEdoesnotaffectinternaloperationsofthe  
latch.Olddatacanberetainedornewdatacanbeenteredwhiletheoutputs  
are in the high-impedance state.  
Drive Features for LVCH374A:  
High Output Drivers: ±24mA  
Reduced system switching noise  
APPLICATIONS:  
The LVCH374A has been designed with a ±24mA output driver. This  
driver is capable of driving a moderate to heavy load while maintaining  
speedperformance.  
• 5V and 3.3V mixed voltage systems  
• Data communication and telecommunication systems  
Inputscanbedrivenfromeither3.3Vor5Vdevices. Thisfeatureallows  
the use of this device as a translator in a mixed 3.3V/5V system environ-  
ment.  
The LVCH374A has “bus-hold” which retains the inputs’ last state  
whenevertheinputgoestoahigh-impedance.Thispreventsfloatinginputs  
and eliminates the need for pull-up/down resistors.  
FUNCTIONALBLOCKDIAGRAM  
1
OE  
CLK  
C1  
2
1Q  
1D  
TO SEVEN OTHER CHANNELS  
EXTENDED COMMERCIAL TEMPERATURE RANGE  
OCTOBER 1999  
1
c
1999 Integrated Device Technology, Inc.  
DSC-4646/-  

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