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IDT74LVCH162823APF8 PDF预览

IDT74LVCH162823APF8

更新时间: 2024-01-30 20:18:09
品牌 Logo 应用领域
艾迪悌 - IDT 驱动光电二极管逻辑集成电路电视
页数 文件大小 规格书
7页 136K
描述
Bus Driver, LVC/LCX/Z Series, 2-Func, 9-Bit, True Output, CMOS, PDSO56, TVSOP-56

IDT74LVCH162823APF8 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SSOP包装说明:TSSOP,
针数:56Reach Compliance Code:compliant
风险等级:5.92其他特性:WITH CLEAR AND CLOCK ENABLE
系列:LVC/LCX/ZJESD-30 代码:R-PDSO-G56
长度:11.3 mm逻辑集成电路类型:BUS DRIVER
位数:9功能数量:2
端口数量:2端子数量:56
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE WITH SERIES RESISTOR输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):NOT SPECIFIED传播延迟(tpd):10 ns
认证状态:Not Qualified座面最大高度:1.2 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2.7 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.4 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:4.4 mmBase Number Matches:1

IDT74LVCH162823APF8 数据手册

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IDT74LVCH162823A  
3.3V CMOS 18-BIT  
BUS INTERFACE REGISTER  
WITH 5 VOLT TOLERANT I/O  
AND BUS-HOLD  
DESCRIPTION:  
FEATURES:  
tSK(0)  
(Output Skew) < 250ps  
Typical  
TheLVCH162823A18-bitbus interfaceregisteris builtusingadvanced  
dual metal CMOS technology. This high-speed, low-power register with  
clock enable (CLKEN) and clear (CLR) controls is ideal for parity bus  
interfacinginhigh-performancesynchronous systems.Thecontrolinputs  
are organized to operate the device as two 9-bit registers or one 18-bit  
register.Flow-throughorganizationofsignalpinssimplifieslayput.Allinputs  
are designedwithhysteresis forimprovednoise margin.  
ESD > 2000V per MIL-STD-883, Method 3015;  
> 200V using machine model (C = 200pF, R = 0)  
0.635mm pitch SSOP, 0.50mm pitch TSSOP  
and 0.40mm pitch TVSOP packages  
Extended commercial range of -40°C to +85°C  
VCC = 3.3V ±0.3V, Normal Range  
VCC = 2.7V to 3.6V, Extended Range  
CMOS power levels (0.4µW typ. static)  
All inputs, outputs and I/O are 5 Volt tolerant  
Supports hot insertion  
All pins of the LVCH162823A can be driven from either 3.3V or 5V  
devices. Thisfeatureallowstheuseofthisdeviceasatranslatorinamixed  
3.3V/5Vsupplysystem.  
Drive Features for LVCH162823A:  
The LVCH162823Ahas series resistors inthe device outputstructure  
whichwillsignificantlyreduce line noise whenusedwithlightloads. This  
driver has been developed to drive ±12mA at the designated threshold  
levels.  
Balanced Output Drivers: ±12mA  
Low Switching Noise  
APPLICATIONS:  
The LVCH162823A has bus-hold” which retains the inputs’ last state  
whenevertheinputgoestoahighimpedance. Thispreventsfloatinginputs  
andeliminates the needforpull-up/downresistors.  
• 5V and 3.3V mixed voltage systems  
Data communication and telecommunication systems  
FUNCTIONALBLOCKDIAGRAM  
27  
2
1
OE  
2
OE  
1
28  
1
CLR  
2
CLR  
56  
55  
29  
30  
1
CLK  
2
CLK  
2
CLKEN  
1
CLKEN  
R
R
C
C
3
15  
Q
1 1  
Q
2 1  
D
D
54  
42  
1 1  
D
D
2 1  
TO EIGHT OTHER CHANNELS  
TO EIGHT OTHER CHANNELS  
EXTENDED COMMERCIAL TEMPERATURE RANGE  
OCTOBER 1999  
1
c
1999 Integrated Device Technology, Inc.  
DSC-4683/-  

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