Datasheet > IDT74LVC137APY8

IDT74LVC137APY8

更新时间： 2024-02-28 18:26:34

品牌	Logo	应用领域
艾迪悌 - IDT		光电二极管
页数	文件大小	规格书
6页	84K
描述
Decoder/Driver, LVC/LCX/Z Series, Inverted Output, CMOS, PDSO16, SSOP-16

阅读下载

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

IDT74LVC137APY8 数据手册

IDT74LVC137A

3.3VCMOS3-LINETO8-LINEDECODER/DEMULTIPLEXER

EXTENDEDCOMMERCIALTEMPERATURERANGE

3.3V CMOS

3-LINE TO 8-LINE

IDT74LVC137A

DECODER/DEMULTIPLEXER,

WITH ADDRESS LATCHES

DESCRIPTION:

FEATURES:

–

0.5 MICRON CMOS Technology

The LVC137A 3-line to 8-line decoder/demultiplexer is built using

ESD > 2000V per MIL-STD-883, Method 3015;

> 200V using machine model (C = 200pF, R = 0)

1.27mm pitch SOIC, 0.635mm pitch QSOP,

0.65mm pitch SSOP, 0.65mm pitch TSSOP packages

Extended commercial range of – 40°C to +85°C

VCC = 3.3V ±0.3V, Normal Range

advanced dual metal CMOS technology. The LVC137A is designed for

high-performancememory-decodingordata-routingapplicationsrequir-

ing very short propagation delay times. In high-performance memory

systems, this decoder minimizes the effects of system decoding. When

employedwithhigh-speedmemoriesutilizingafastenablecircuit,thedelay

times of this decoder and the enable time of the memory are usually less

than the typical access time of the memory. This means that the effective

system delay introduced by the decoder is negligible.

–

VCC = 2.3V to 3.6V, Extended Range

CMOS power levels (0.4µW typ. static)

Rail-to-Rail output swing for increased noise margin

All inputs, outputs and I/O are 5 Volt tolerant

Supports hot insertion

When the latch enable (G2A) input is low, the LVC137A acts as a

decoder/demultiplexer.WhenG2Atransitionsfromlowtohigh,theaddress

presentattheinputs(A, B, andC)isstoredinthelatches. Furtheraddress

changesareignored, providedG2Aremainshigh. Theoutput-enable(G1

and G2B) inputs control the outputs independently of the select or latch-

enable inputs. All of the outputs are forced high if G1 is low or G2Bis high.

Drive Features for LVC137A:

–

High Output Drivers: ±24mA

Reduced system switching noise

APPLICATIONS:

Inputscanbedrivenfromeither3.3Vor5Vdevices. Thisfeatureallows

the use of this device as a translator in a mixed 3.3V/5V supply system.

• 5V and 3.3V mixed voltage systems

• Data communication and telecommunication systems

The LVC137A has been designed with a ±24mA output driver. This

driver is capable of driving a moderate to heavy load while maintaining

speedperformance.

FUNCTIONALBLOCKDIAGRAM

Select

Inputs

Data

Outputs

Latch

Enable

G2A

G2B

Output

Enables

EXTENDED COMMERCIAL TEMPERATURE RANGE

OCTOBER 1999

1999 Integrated Device Technology, Inc.

DSC-4753/1

12 3 4 5 6

下载PDF

与IDT74LVC137APY8相关器件

型号	品牌	描述	获取价格	数据表
IDT74LVC137AQ	IDT	Decoder/Driver, LVC/LCX/Z Series, Inverted Output, CMOS, PDSO16, QSOP-16	获取价格
IDT74LVC137AQ8	IDT	Decoder/Driver, LVC/LCX/Z Series, Inverted Output, CMOS, PDSO16, QSOP-16	获取价格
IDT74LVC138A	IDT	3.3V CMOS 3-LINE TO 8-LINE DECODER/DEMULTIPLEXER WITH 5 VOLT TOLERANT I/O	获取价格
IDT74LVC138ADC	IDT	3.3V CMOS 3-LINE TO 8-LINE DECODER/DEMULTIPLEXER WITH 5 VOLT TOLERANT I/O	获取价格
IDT74LVC138ADC8	IDT	Decoder/Driver, LVC/LCX/Z Series, Inverted Output, CMOS, PDSO16, SOIC-16	获取价格
IDT74LVC138APG	IDT	3.3V CMOS 3-LINE TO 8-LINE DECODER/DEMULTIPLEXER WITH 5 VOLT TOLERANT I/O	获取价格