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IDT74FCT646ATL

更新时间： 2024-11-15 23:11:47
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
9页 193K
描述
FAST CMOS OCTAL TRANSCEIVER/ REGISTERS (3-STATE)

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中文翻译

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IDT74FCT646ATL 技术参数

生命周期：Obsolete零件包装代码：QLCC
包装说明：QCCN,针数：28
Reach Compliance Code：unknown风险等级：5.29
其他特性：DIRECTION CONTROL系列：FCT
JESD-30 代码：S-CQCC-N28JESD-609代码：e0
长度：11.4554 mm负载电容（CL）：50 pF
逻辑集成电路类型：REGISTERED BUS TRANSCEIVER位数：8
功能数量：1端口数量：2
端子数量：28最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：CERAMIC, METAL-SEALED COFIRED
封装代码：QCCN封装形状：SQUARE
封装形式：CHIP CARRIER传播延迟（tpd）：6.3 ns
认证状态：Not Qualified座面最大高度：2.54 mm
最大供电电压 (Vsup)：5.25 V最小供电电压 (Vsup)：4.75 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：TIN LEAD端子形式：NO LEAD
端子节距：1.27 mm端子位置：QUAD
宽度：11.4554 mmBase Number Matches：1

IDT74FCT646ATL 数据手册

 浏览型号IDT74FCT646ATL的Datasheet PDF文件第2页浏览型号IDT74FCT646ATL的Datasheet PDF文件第3页浏览型号IDT74FCT646ATL的Datasheet PDF文件第4页浏览型号IDT74FCT646ATL的Datasheet PDF文件第5页浏览型号IDT74FCT646ATL的Datasheet PDF文件第6页浏览型号IDT74FCT646ATL的Datasheet PDF文件第7页 
IDT54/74FCT646T/AT/CT/DT - 2646T/AT/CT  
IDT54/74FCT648T/AT/CT  
IDT54/74FCT652T/AT/CT/DT - 2652T/AT/CT  
FAST CMOS OCTAL  
TRANSCEIVER/  
REGISTERS (3-STATE)  
Integrated Device Technology, Inc.  
FEATURES:  
• Common features:  
– Low input and output leakage ≤1µA (max.)  
– Extended commercial range of –40°C to +85°C  
– CMOS power levels  
– True TTL input and output compatibility  
– VOH = 3.3V (typ.)  
DESCRIPTION:  
TheFCT646T/FCT2646T/FCT648T/FCT652T/2652Tcon-  
sist of a bus transceiver with 3-state D-type flip-flops and  
control circuitry arranged for multiplexed transmission of data  
directly from the data bus or from the internal storage regis-  
ters.  
The FCT652T/FCT2652T utilize GAB and GBA signals to  
control the transceiver functions. The FCT646T/FCT2646T/  
FCT648T utilize the enable control (G) and direction (DIR)  
pins to control the transceiver functions.  
SABandSBAcontrolpinsareprovidedtoselecteitherreal-  
time or stored data transfer. The circuitry used for select  
control will eliminate the typical decoding glitch that occurs in  
a multiplexer during the transition between stored and real-  
time data. A LOW input level selects real-time data and a  
HIGH selects stored data.  
Data on the A or B data bus, or both, can be stored in the  
internal D flip-flops by LOW-to-HIGH transitions at the appro-  
priate clock pins (CPAB or CPBA), regardless of the select or  
enable control pins.  
– VOL = 0.3V (typ.)  
– Meets or exceeds JEDEC standard 18 specifications  
– Product available in Radiation Tolerant and Radiation  
Enhanced versions  
– Military product compliant to MIL-STD-883, Class B  
and DESC listed (dual marked)  
– Available in DIP, SOIC, SSOP, QSOP, TSSOP,  
CERPACK and LCC packages  
• Features for FCT646T/648T/652T:  
– Std., A, C and D speed grades  
– High drive outputs (-15mA IOH, 64mA IOL)  
– Power off disable outputs permit “live insertion”  
• Features for FCT2646T/2652T:  
The FCT26xxT have balanced drive outputs with current  
limiting resistors. This offers low ground bounce, minimal  
undershoot and controlled output fall times-reducing the need  
for external series terminating resistors. FCT2xxxT parts are  
plug-in replacements for FCTxxxT parts.  
– Std., A, and C speed grades  
– Resistor outputs (-15mA IOH, 12mA IOL Com.)  
(-12mA IOH, 12mA IOL Mil.)  
– Reduced system switching noise  
FUNCTIONAL BLOCK DIAGRAM  
IDT54/74FCT652/2652  
ONLY  
GAB  
GBA  
IDT54/74FCT646/2646/648  
ONLY  
G
DIR  
CPBA  
SBA  
CPAB  
SAB  
B REG  
646/2646/652/2652  
1 OF 8 CHANNELS  
1D  
C1  
ONLY  
A REG  
1D  
B1  
A1  
C1  
2634 drw 01  
646/2646/652/2652  
ONLY  
TO 7 OTHER CHANNELS  
The IDT logo is a registered trademark of Integrated Device Technology, Inc.  
MILITARY AND COMMERCIAL TEMPERATURE RANGES  
SEPTEMBER 1996  
1996 Integrated Device Technology, Inc.  
6.20  
DSC-2634/9  
1
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中文翻译

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