IDT54/74FCT16646T/AT/CT/ET
IDT54/74FCT162646T/AT/CT/ET
FAST CMOS 16-BIT BUS
TRANSCEIVER/
REGISTERS (3-STATE)
Integrated Device Technology, Inc.
74FCT162646T/AT/CT/ET 16-bit registered transceivers are
built using advanced dual metal CMOS technology. These
high-speed, low-power devices are organized as two inde-
pendent 8-bit bus transceivers with 3-state D-type registers.
The control circuitry is organized for multiplexed transmission
of data between A bus and B bus either directly or from the
internal storage registers. Each 8-bit transceiver/register fea-
tures direction control (xDIR), over-riding Output Enable con-
trol (xOE) and Select lines (xSAB and xSBA) to select either
real-time data or stored data. Separate clock inputs are
provided for A and B port registers. Data on the A or B data
bus, or both, can be stored in the internal registers by the
LOW-to-HIGH transitions at the appropriate clock pins. Flow-
through organization of signal pins simplifies layout. All inputs
are designed with hysteresis for improved noise margin.
The IDT54/74FCT16646T/AT/CT/ET are ideally suited for
driving high-capacitance loads and low-impedance
backplanes. The output buffers are designed with power off
disable capability to allow "live insertion" of boards when used
as backplane drivers.
FEATURES:
• Common features:
– 0.5 MICRON CMOS Technology
– High-speed, low-power CMOS replacement for
ABT functions
– Typical tSK(o) (Output Skew) < 250ps
– Low input and output leakage ≤1µA (max.)
– ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
– Packages include 25 mil pitch SSOP, 19.6 mil pitch
TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack
– Extended commercial range of -40°C to +85°C
– VCC = 5V ±10%
• Features for FCT16646T/AT/CT/ET:
– High drive outputs (-32mA IOH, 64mA IOL)
– Power off disable outputs permit “live insertion”
– Typical VOLP (Output Ground Bounce) < 1.0V at
VCC = 5V, TA = 25°C
• Features for FCT162646T/AT/CT/ET:
– Balanced Output Drivers: ±24mA (commercial),
±16mA (military)
– Reduced system switching noise
– Typical VOLP (Output Ground Bounce) < 0.6V at
VCC = 5V,TA = 25°C
The IDT54/74FCT162646T/AT/CT/ET have balanced
output drive with current limiting resistors. This offers low
ground bounce, minimal undershoot, and controlled output
fall times–reducing the need for external series terminating
resistors. The IDT54/74FCT162646T/AT/CT/ET are plug-in
replacements for the IDT54/74FCT16646T/AT/CT/ET and
54/74ABT16646 for on-board bus interface applications.
DESCRIPTION:
The IDT54/74FCT16646T/AT/CT/ET and IDT54/
FUNCTIONAL BLOCK DIAGRAM
1OE
2OE
1DIR
2DIR
1CLKBA
1SBA
2
CLKBA
SBA
CLKAB
2
1CLKAB
2
1SAB
2SAB
B REG
B REG
D
D
C
C
A REG
2B1
1B1
A REG
1A1
2A1
D
D
C
C
TO 7 OTHER CHANNELS
TO 7 OTHER CHANNELS
2540 drw 01
2540 drw 02
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
AUGUST 1996
1996 Integrated Device Technology, Inc.
5.13
DSC-4231/9
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