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IDT74FCT162646ATE PDF预览

IDT74FCT162646ATE

更新时间: 2024-10-28 23:12:47
品牌 Logo 应用领域
艾迪悌 - IDT 总线收发器
页数 文件大小 规格书
9页 181K
描述
FAST CMOS 16-BIT BUS TRANSCEIVER/ REGISTERS (3-STATE)

IDT74FCT162646ATE 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:DFP
包装说明:DFP,针数:56
Reach Compliance Code:compliant风险等级:5.89
其他特性:WITH DIRECTION CONTROL系列:FCT
JESD-30 代码:R-GDFP-F56JESD-609代码:e0
长度:18.415 mm负载电容(CL):50 pF
逻辑集成电路类型:REGISTERED BUS TRANSCEIVER位数:8
功能数量:2端口数量:2
端子数量:56最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE WITH SERIES RESISTOR
输出极性:TRUE封装主体材料:CERAMIC, GLASS-SEALED
封装代码:DFP封装形状:RECTANGULAR
封装形式:FLATPACK峰值回流温度(摄氏度):225
传播延迟(tpd):6.3 ns认证状态:Not Qualified
座面最大高度:2.413 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:FLAT端子节距:0.635 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:9.652 mmBase Number Matches:1

IDT74FCT162646ATE 数据手册

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IDT54/74FCT16646T/AT/CT/ET  
IDT54/74FCT162646T/AT/CT/ET  
FAST CMOS 16-BIT BUS  
TRANSCEIVER/  
REGISTERS (3-STATE)  
Integrated Device Technology, Inc.  
74FCT162646T/AT/CT/ET 16-bit registered transceivers are  
built using advanced dual metal CMOS technology. These  
high-speed, low-power devices are organized as two inde-  
pendent 8-bit bus transceivers with 3-state D-type registers.  
The control circuitry is organized for multiplexed transmission  
of data between A bus and B bus either directly or from the  
internal storage registers. Each 8-bit transceiver/register fea-  
tures direction control (xDIR), over-riding Output Enable con-  
trol (xOE) and Select lines (xSAB and xSBA) to select either  
real-time data or stored data. Separate clock inputs are  
provided for A and B port registers. Data on the A or B data  
bus, or both, can be stored in the internal registers by the  
LOW-to-HIGH transitions at the appropriate clock pins. Flow-  
through organization of signal pins simplifies layout. All inputs  
are designed with hysteresis for improved noise margin.  
The IDT54/74FCT16646T/AT/CT/ET are ideally suited for  
driving high-capacitance loads and low-impedance  
backplanes. The output buffers are designed with power off  
disable capability to allow "live insertion" of boards when used  
as backplane drivers.  
FEATURES:  
• Common features:  
– 0.5 MICRON CMOS Technology  
– High-speed, low-power CMOS replacement for  
ABT functions  
Typical tSK(o) (Output Skew) < 250ps  
– Low input and output leakage 1µA (max.)  
– ESD > 2000V per MIL-STD-883, Method 3015;  
> 200V using machine model (C = 200pF, R = 0)  
– Packages include 25 mil pitch SSOP, 19.6 mil pitch  
TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack  
– Extended commercial range of -40°C to +85°C  
– VCC = 5V ±10%  
• Features for FCT16646T/AT/CT/ET:  
– High drive outputs (-32mA IOH, 64mA IOL)  
– Power off disable outputs permit “live insertion”  
– Typical VOLP (Output Ground Bounce) < 1.0V at  
VCC = 5V, TA = 25°C  
• Features for FCT162646T/AT/CT/ET:  
– Balanced Output Drivers: ±24mA (commercial),  
±16mA (military)  
– Reduced system switching noise  
– Typical VOLP (Output Ground Bounce) < 0.6V at  
VCC = 5V,TA = 25°C  
The IDT54/74FCT162646T/AT/CT/ET have balanced  
output drive with current limiting resistors. This offers low  
ground bounce, minimal undershoot, and controlled output  
fall times–reducing the need for external series terminating  
resistors. The IDT54/74FCT162646T/AT/CT/ET are plug-in  
replacements for the IDT54/74FCT16646T/AT/CT/ET and  
54/74ABT16646 for on-board bus interface applications.  
DESCRIPTION:  
The IDT54/74FCT16646T/AT/CT/ET and IDT54/  
FUNCTIONAL BLOCK DIAGRAM  
1OE  
2OE  
1DIR  
2DIR  
1CLKBA  
1SBA  
2
CLKBA  
SBA  
CLKAB  
2
1CLKAB  
2
1SAB  
2SAB  
B REG  
B REG  
D
D
C
C
A REG  
2B1  
1B1  
A REG  
1A1  
2A1  
D
D
C
C
TO 7 OTHER CHANNELS  
TO 7 OTHER CHANNELS  
2540 drw 01  
2540 drw 02  
The IDT logo is a registered trademark of Integrated Device Technology, Inc.  
MILITARY AND COMMERCIAL TEMPERATURE RANGES  
AUGUST 1996  
1996 Integrated Device Technology, Inc.  
5.13  
DSC-4231/9  
1

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