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IDT74FCT16244TPAG PDF预览

IDT74FCT16244TPAG

更新时间: 2024-10-28 13:00:31
品牌 Logo 应用领域
艾迪悌 - IDT 驱动器
页数 文件大小 规格书
9页 155K
描述
Bus Driver, FCT Series, 4-Func, 4-Bit, True Output, CMOS, PDSO48, GREEN, MO-153-ED, TSSOP-48

IDT74FCT16244TPAG 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active零件包装代码:TSSOP
包装说明:TSSOP, TSSOP48,.3,20针数:48
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.02Is Samacsys:N
控制类型:ENABLE LOW系列:FCT
JESD-30 代码:R-PDSO-G48JESD-609代码:e3
长度:12.497 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.064 A
湿度敏感等级:1位数:4
功能数量:4端口数量:2
端子数量:48最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP48,.3,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260电源:5 V
Prop。Delay @ Nom-Sup:7 ns传播延迟(tpd):6.5 ns
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):5.25 V
最小供电电压 (Vsup):4.75 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn) - annealed
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:6.1 mmBase Number Matches:1

IDT74FCT16244TPAG 数据手册

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FAST CMOS 16-BIT  
BUFFER/LINE DRIVER  
IDT54/74FCT16244T/AT/CT/ET  
IDT54/74FCT162244T/AT/CT/ET  
IDT54/74FCT166244T/AT/CT  
IDT54/74FCT162H244T/AT/CT/ET  
Integrated Device Technology, Inc.  
FEATURES:  
• Common features:  
– 0.5 MICRON CMOS Technology  
– High-speed, low-power CMOS replacement for  
ABT functions  
Typical tSK(o) (Output Skew) < 250ps  
– Low input and output leakage 1µA (max.)  
– ESD > 2000V per MIL-STD-883, Method 3015;  
> 200V using machine model (C = 200pF, R = 0)  
– Packages include 25 mil pitch SSOP, 19.6 mil pitch  
TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack  
– Extended commercial range of -40°C to +85°C  
• Features for FCT16244T/AT/CT/ET:  
– High drive outputs (-32mA IOH, 64mA IOL)  
– Power off disable outputs permit “live insertion”  
– Typical VOLP (Output Ground Bounce) < 1.0V at  
VCC = 5V, TA = 25°C  
DESCRIPTION:  
The16-BitBuffer/LineDriverisforbusinterfaceorsignalbuffering  
applicationsrequiringhighspeedandlowpowerdissipation. These  
devices have a flow through pin organization, and shrink packaging  
to simplify board layout. All inputs are designed with hysteresis for  
improvednoisemargin. Thethree-statecontrolsallowindependent  
4-bit, 8-bit or combined 16-bit operation. These parts are plug in  
replacementsfor54/74ABT16244wherehigherspeed,lowernoise  
or lower power dissipation levels are desired.  
The FCT16244T/AT/CT/ET are ideally suited for driving  
high capacitance loads (>200pF) and low impedance  
backplanes. These "high drive" buffers are designed with  
power off disable capability to allow "live insertion" of boards  
when used in a backplane interface.  
TheFCT162244T/AT/CT/EThavebalancedoutputcurrent  
levels and current limiting resistors. These offer low ground  
bounce, minimal undershoot, and controlled output fall times,  
reducing the need for external series terminating resistors  
while still providing very high speed operation for loads of less  
than 200pF.  
• Features for FCT162244T/AT/CT/ET:  
– Balanced Output Drivers: ±24mA (commercial),  
±16mA (military)  
The FCT166244T/AT/CT are suited for very low noise,  
point-to-pointdrivingwherethereisasinglereceiver, oravery  
light lumped load (<100pF). The buffers are designed to limit  
the output current to levels which will avoid noise and ringing  
on the signal lines without using external series terminating  
resistors.  
– Reduced system switching noise  
– Typical VOLP (Output Ground Bounce) < 0.6V at  
VCC = 5V,TA = 25°C  
• Features for FCT166244T/AT/CT:  
– Light Drive Balanced Output: ±8mA (commercial),  
±6mA (military)  
The FCT162H244T/AT/CT/ET have "Bus-Hold" which re-  
tains the input's last state whenever the input goes to high  
impedance. This prevents "floating" inputs and eliminates the  
need for pull-up/down resistors.  
– Minimal system switching noise  
– Typical VOLP (Output Ground Bounce) < 0.25V at  
VCC = 5V,TA = 25°C  
• Features for FCT162H244T/AT/CT/ET:  
– Bus-Hold retains last active bus state during 3-state  
– Eliminates the need for external pull up resistors  
FUNCTIONAL BLOCK DIAGRAM  
3OE  
1OE  
1Y1  
3A1  
3A2  
3Y1  
3Y2  
1A1  
1A2  
1Y2  
1Y3  
3A3  
3A4  
3Y3  
3Y4  
1A3  
1A4  
1Y4  
4OE  
2OE  
4A1  
4A2  
4A3  
2Y1  
4Y1  
4Y2  
4Y3  
2A1  
2A2  
2Y2  
2Y3  
2A3  
4A4  
2Y4  
4Y4  
2A4  
2544 drw 02  
2544 drw 01  
The IDT logo is a registered trademark of Integrated Device Technology, Inc.  
MILITARY AND COMMERCIAL TEMPERATURE RANGES  
OCTOBER 1996  
1996 Integrated Device Technology, Inc.  
5.2  
DSC-2544/9  
15  

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