IDT54/74FCT16240T/AT/CT/ET
IDT54/74FCT162240T/AT/CT/ET
FAST CMOS 16-BIT
BUFFER/LINE DRIVER
Integrated Device Technology, Inc.
FEATURES:
DESCRIPTION:
• Common features:
– 0.5 MICRON CMOS Technology
– High-speed, low-power CMOS replacement for
ABT functions
The FCT16240T/AT/CT/ET and FCT162240T/AT/CT/ET
16-bit buffer/line drivers are built using advanced dual metal
CMOS technology. These high-speed, low-power devices
offerbus/backplaneinterfacecapabilitywithimprovedpacking
density.Theflow-throughorganizationofsignalpinssimplifies
layout. Thethree-statecontrolsaredesignedtooperatethese
devices in a Quad-Nibble, Dual-Byte or single 16-bit word
mode. All inputs are designed with hysteresis for improved
noise margin.
The FCT16240T/AT/CT/ET are ideally suited for driving
high capacitance loads and low-impedance backplanes. The
output buffers are designed with power off disable capability
to allow "live insertion" of boards when used as backplane
drivers.
The FCT162240T/AT/CT/ET have balanced output drive
with current limiting resistors. This offers low ground bounce,
minimal undershoot, and controlled output fall times– reduc-
ing the need for external series terminating resistors. The
FCT162240T/AT/CT/ET are plug-in replacements for
FCT16240T/AT/CT/ET and 54/74ABT16240 for on-board in-
terface applications.
– Typical tSK(o) (Output Skew) < 250ps
– Low input and output leakage ≤1µA (max.)
– ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
– Packages include 25 mil pitch SSOP, 19.6 mil pitch
TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack
– Extended commercial range of -40°C to +85°C
– VCC = 5V ±10%
• Features for FCT16240T/AT/CT/ET:
– High drive outputs (-32mA IOH, 64mA IOL)
– Power off disable outputs permit “live insertion”
– Typical VOLP (Output Ground Bounce) < 1.0V at
VCC = 5V, TA = 25°C
• Features for FCT162240T/AT/CT/ET:
– Balanced Output Drivers: ±24mA (commercial),
±16mA (military)
– Reduced system switching noise
– Typical VOLP (Output Ground Bounce) < 0.6V at
VCC = 5V,TA = 25°C
FUNCTIONAL BLOCK DIAGRAM
1OE
3OE
3A1
3A2
3Y1
3Y2
1Y1
1Y2
1A1
1A2
3A3
3A4
3Y3
3Y4
1Y3
1Y4
1A3
1A4
4OE
2OE
4Y1
4Y2
2Y1
2Y2
4A1
4A2
2A1
2A2
4Y3
4Y4
2Y3
2Y4
4A3
4A4
2A3
2A4
2541 drw 02
2541 drw 01
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
AUGUST 1996
1996 Integrated Device Technology, Inc.
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