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IDT74AUC16373PAI8 PDF预览

IDT74AUC16373PAI8

更新时间: 2024-11-11 20:10:51
品牌 Logo 应用领域
艾迪悌 - IDT 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
7页 86K
描述
Bus Driver, AUC Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48, TSSOP-48

IDT74AUC16373PAI8 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP-48
针数:48Reach Compliance Code:not_compliant
风险等级:5.92系列:AUC
JESD-30 代码:R-PDSO-G48JESD-609代码:e0
长度:12.5 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.0001 A
湿度敏感等级:1位数:8
功能数量:2端口数量:2
端子数量:48最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP56,.3,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:0.8/2.7 V传播延迟(tpd):4.9 ns
认证状态:Not Qualified座面最大高度:1.1 mm
子类别:FF/Latches最大供电电压 (Vsup):2.7 V
最小供电电压 (Vsup):0.8 V标称供电电压 (Vsup):1.2 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn85Pb15)
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:6.1 mmBase Number Matches:1

IDT74AUC16373PAI8 数据手册

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1.8V CMOS 16-BIT TRANSPARENT  
IDT74AUC16373  
D-TYPE LATCH WITH  
3-STATE OUTPUTS  
DESCRIPTION:  
FEATURES:  
This16-bittransparentD-typelatchisbuiltusingadvancedCMOStechnol-  
ogy. Thedevicecanbeusedasasingle16-bitlatchorastwo8-bitlatches. When  
thelatchenable(LE)inputishigh,theQoutputsfollowthedata(D)inputs. When  
LE is taken low, the Q outputs are latched at the levels set up at the D inputs.  
Abufferedoutputenable(OE)inputcanbeusedtoplacetheeightoutputs  
ineitheranormallogicstate(highorlowlogiclevels)orahigh-impedancestate.  
In the high-impedance state, the outputs neither load nor drive the bus lines  
significantly. TheOEinputdoesnotaffecttheinternaloperationofthelatch.  
Thisdeviceisfullyspecifiedforpartialpower-downapplicationsusingIOFF.  
TheIOFF circuitrydisablestheoutputs,preventingdamagingcurrentbackflow  
through the device when it is powered down.  
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using  
machine model (C = 200pF, R = 0)  
• 1.8VOptimized  
• 0.8V to 2.7V Operating Range  
• Inputs/outputs tolerant up to 3.6V  
• Output drivers: ±9mA @ 2.3V  
• Supports hot insertion  
• Available in TSSOP, TVSOP, and VFBGA packages  
APPLICATIONS:  
To ensure the high-impedance state during power up or power down, OE  
shouldbetiedtoVDD throughapull-upresistor;theminimumvalueoftheresistor  
isdeterminedbythecurrent-sinkingcapabilityofthedriver.  
• high performance, low voltage communications systems  
• high performance, low voltage computing systems  
FUNCTIONALBLOCKDIAGRAM  
1OE  
1LE  
2OE  
2LE  
C1  
C1  
1Q1  
2Q1  
1D1  
2D1  
1D  
1D  
TO SEVEN OTHER CHANNELS  
TO SEVEN OTHER CHANNELS  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
INDUSTRIAL TEMPERATURE RANGE  
FEBRUARY 2003  
1
© 2003 Integrated Device Technology, Inc.  
DSC-6169/9  

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