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IDT74ALVCH16721PA PDF预览

IDT74ALVCH16721PA

更新时间: 2024-11-26 04:58:31
品牌 Logo 应用领域
艾迪悌 - IDT 总线驱动器总线收发器触发器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
6页 66K
描述
3.3V CMOS 20-BIT FLIP-FLOP WITH 3-STATE OUTPUTS AND BUS-HOLD

IDT74ALVCH16721PA 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP, TSSOP56,.3,20
针数:56Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.31
Is Samacsys:N其他特性:WITH CLOCK ENABLE
系列:ALVC/VCX/AJESD-30 代码:R-PDSO-G56
JESD-609代码:e0长度:14 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大频率@ Nom-Sup:150000000 Hz最大I(ol):0.024 A
湿度敏感等级:1位数:20
功能数量:1端口数量:2
端子数量:56最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP56,.3,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):240电源:3.3 V
Prop。Delay @ Nom-Sup:4 ns传播延迟(tpd):5.1 ns
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:FF/Latches最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn85Pb15)
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:20
触发器类型:POSITIVE EDGE宽度:6.1 mm
Base Number Matches:1

IDT74ALVCH16721PA 数据手册

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IDT74ALVCH16721  
3.3V CMOS 20-BIT  
FLIP-FLOP WITH 3-STATE  
OUTPUTS AND BUS-HOLD  
DESCRIPTION:  
FEATURES:  
This20-bitflip-flopisbuiltusingadvanceddualmetalCMOStechnology.The  
20 flip-flops of the ALVCH16721 are edge-triggered D-type flip-flops with  
qualifiedclockstorage.Onthepositivetransitionoftheclock(CLK)input,the  
deviceprovidestruedataattheQoutputsiftheclock-enable(CLKEN)input  
is low. If CLKEN is high, no data is stored.  
• 0.5 MICRON CMOS Technology  
• Typical tSK(o) (Output Skew) < 250ps  
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using  
machine model (C = 200pF, R = 0)  
• VCC = 3.3V ± 0.3V, Normal Range  
• VCC = 2.7V to 3.6V, Extended Range  
• VCC = 2.5V ± 0.2V  
• CMOS power levels (0.4µ W typ. static)  
• Rail-to-Rail output swing for increased noise margin  
• Available in SSOP and TSSOP packages  
Abufferedoutput-enable(OE)inputplacesthe20outputsineitheranormal  
logicstate(highorlow)orahigh-impedancestate.Inthehigh-impedancestate,  
the outputs neither load nor drive the bus lines significantly. The high-  
impedancestateandincreaseddriveprovidethecapabilitytodrivebuslines  
withoutneedforinterfaceorpullupcomponents.OEdoesnotaffecttheinternal  
operationoftheflip-flops.Olddatacanberetainedornewdatacanbeentered  
whiletheoutputsareinthehigh-impedancestate.  
The ALVCH16721 has been designed with a ±24mA output driver. This  
driveriscapableofdrivingamoderatetoheavyloadwhilemaintainingspeed  
performance.  
DRIVE FEATURES:  
• High Output Drivers: ±24mA  
• Low switching noise  
The ALVCH16721 has “bus-hold” which retains the inputs’ last state  
whenevertheinputgoestoahighimpedance. Thispreventsfloatinginputs  
andeliminatestheneedforpull-up/downresistor.  
APPLICATIONS:  
• 3.3V high speed systems  
• 3.3V and lower voltage computing systems  
FUNCTIONALBLOCKDIAGRAM  
1
OE  
56  
CLK  
29  
CLKEN  
CE  
C1  
1D  
2
Q1  
55  
D1  
TO 19 OTHER CHANNELS  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
INDUSTRIAL TEMPERATURE RANGE  
JANUARY 2004  
1
© 2004 Integrated Device Technology, Inc.  
DSC-4747/2  

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