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IDT74ALVCH16373PA PDF预览

IDT74ALVCH16373PA

更新时间: 2024-11-05 22:57:23
品牌 Logo 应用领域
艾迪悌 - IDT 输出元件
页数 文件大小 规格书
6页 68K
描述
3.3V CMOS 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS AND BUS-HOLD

IDT74ALVCH16373PA 数据手册

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3.3V CMOS 16-BIT  
IDT74ALVCH16373  
TRANSPARENT D-TYPE  
LATCH WITH 3-STATE  
OUTPUTS AND BUS-HOLD  
FEATURES:  
DESCRIPTION:  
• 0.5 MICRON CMOS Technology  
This16-bittransparentD-typelatchisbuiltusingadvanceddualmetalCMOS  
technology.TheALVCH16373isparticularlysuitableforimplementingbuffer  
registers,I/Oports,bidirectionalbusdrivers,andworkingregisters.Thisdevice  
canbeusedastwo8-bitlatchesorone16-bitlatch.Whenthelatchenable(LE)  
inputishigh,theQoutputsfollowthedata(D)inputs.WhenLEistakenlow,the  
QoutputsarelatchedatthelevelssetupattheDinputs.  
• Typical tSK(o) (Output Skew) < 250ps  
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using  
machine model (C = 200pF, R = 0)  
• VCC = 3.3V ± 0.3V, Normal Range  
• VCC = 2.7V to 3.6V, Extended Range  
• VCC = 2.5V ± 0.2V  
• CMOS power levels (0.4µ W typ. static)  
• Rail-to-Rail output swing for increased noise margin  
• Available in SSOP and TSSOP packages  
Abufferedoutput-enable(OE)canbeusedtoplacetheeightoutputsineither  
anormallogicstate(highorlowlogiclevels)orahigh-impedancestate.Inthe  
high-impedancestate,theoutputsneitherloadnordrivethebuslinessignifi-  
cantly.Thehigh-impedancestateandtheincreaseddriveprovidethecapability  
todrivebuslineswithoutneedforinterfaceorpullupcomponents.OEdoesnot  
affectinternaloperationsofthelatch.Olddatacanberetainedornewdatacan  
beeneteredwhiletheoutputsareinthehigh-impedancestate.  
The ALVCH16373 has been designed with a ±24mA output driver. This  
driveriscapableofdrivingamoderatetoheavyloadwhilemaintainingspeed  
performance.  
DRIVE FEATURES:  
• High Output Drivers: ±24mA  
• Suitable for heavy loads  
APPLICATIONS:  
• 3.3V high speed systems  
The ALVCH16373 has “bus-hold” which retains the inputs’ last state  
whenevertheinputgoestoahighimpedance.Thispreventsfloatinginputsand  
eliminatestheneedforpull-up/downresistor.  
• 3.3V and lower voltage computing systems  
FUNCTIONALBLOCKDIAGRAM  
1
24  
2OE  
1OE  
48  
25  
2LE  
1LE  
C1  
C1  
2
13  
1Q1  
2Q1  
47  
36  
1D1  
1D  
1D  
2D1  
TO 7 OTHER CHANNELS  
TO 7 OTHER CHANNELS  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
INDUSTRIAL TEMPERATURE RANGE  
JANUARY 2004  
1
© 2004 Integrated Device Technology, Inc.  
DSC-4574/2  

IDT74ALVCH16373PA 替代型号

型号 品牌 替代类型 描述 数据表
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