IDT74ALVCH162373
INDUSTRIALTEMPERATURERANGE
3.3VCMOS16-BITTRANSPARENTD-TYPELATCHWITH3-STATEOUTPUTS
3.3V CMOS 16-BIT TRANS-
PARENT D-TYPE LATCH
WITH 3-STATE OUTPUTS
AND BUS-HOLD
IDT74ALVCH162373
FEATURES:
DESCRIPTION:
• 0.5 MICRON CMOS Technology
This16-bittransparentD-typelatchisbuiltusingadvanceddualmetalCMOS
technology.TheALVCH162373isparticularlysuitableforimple-mentingbuffer
registers,I/Oports,bidirectionalbusdrivers,andworkingregisters.Thisdevice
canbeusedastwo8-bitlatchesorone16-bitlatch.Whenthelatchenable(LE)
inputishigh,theQoutputsfollowthedata(D)inputs.WhenLEistakenlow,the
QoutputsarelatchedatthelevelssetupattheDinputs.
• Typical tSK(o) (Output Skew) < 250ps
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
• VCC = 3.3V ± 0.3V, Normal Range
• VCC = 2.7V to 3.6V, Extended Range
• VCC = 2.5V ± 0.2V
• CMOS power levels (0.4µ W typ. static)
• Rail-to-Rail output swing for increased noise margin
• Available in SSOP and TSSOP packages
Abufferedoutput-enable(OE)canbeusedtoplacetheeightoutputsineither
anormallogicstate(highorlowlogiclevels)orahigh-impedancestate.Inthe
high-impedancestate,theoutputsneitherloadnordrivethebuslinessignifi-
cantly.Thehigh-impedancestateandtheincreaseddriveprovidethecapability
todrivebuslineswithoutneedforinterfaceorpullupcomponents.OEdoesnot
affectinternaloperationsofthelatch.Olddatacanberetainedornewdatacan
beeneteredwhiletheoutputsareinthehigh-impedancestate.
TheALVCH162373hasseriesresistorsinthedeviceoutputstructurewhich
willsignificantlyreducelinenoisewhenusedwithlightloads. Thisdriverhas
beendesignedtodrive±12mAatthedesignatedthresholdlevels.
The ALVCH162373 has “bus-hold” which retains the inputs’ last state
whenevertheinputgoestoahighimpedance.Thispreventsfloatinginputsand
eliminatestheneedforpull-up/downresistor.
DRIVE FEATURES:
• Balanced Output Drivers: ±12mA
• Low switching noise
APPLICATIONS:
• 3.3V high speed systems
• 3.3V and lower voltage computing systems
FUNCTIONALBLOCKDIAGRAM
1
24
2OE
1OE
48
25
2LE
1LE
C1
C1
2
13
1Q1
2Q1
47
36
1D1
1D
1D
2D1
TO 7 OTHER CHANNELS
TO 7 OTHER CHANNELS
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.
INDUSTRIAL TEMPERATURE RANGE
JANUARY 2004
1
© 2004 Integrated Device Technology, Inc.
DSC-4575/3