Datasheet > IDT74ALVC125DC

IDT74ALVC125DC

更新时间： 2024-02-21 19:09:32

品牌	Logo	应用领域
艾迪悌 - IDT		输出元件
页数	文件大小	规格书
6页	112K
描述
3.3V CMOS QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS

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IDT74ALVC125DC 数据手册

IDT74ALVC125

INDUSTRIALTEMPERATURERANGE

3.3V CMOS QUADRUPLE BUS BUFFER GATE

3.3V CMOS

IDT74ALVC125

QUADRUPLE BUS

BUFFER GATE WITH

3-STATE OUTPUTS

FEATURES:

DESCRIPTION:

–

0.5 MICRON CMOS Technology

ThisquadruplebusbuffergateisbuiltusingadvanceddualmetalCMOS

technology.The ALVC125features independentline drivers with3-state

outputs.Eachoutputis disabledwhentheassociatedoutput-enable(OE)

inputis high.

ESD > 2000V per MIL-STD-883, Method 3015;

> 200V using machine model (C = 200pF, R = 0)

V^CC= 3.3V ± 0.3V, Normal Range

V^CC= 2.7V to 3.6V, Extended Range

V^CC= 2.5V ± 0.2V

CMOS power levels (0.4µW typ. static)

Rail-to-Rail output swing for increased noise margin

Available in SOIC, SSOP and TSSOP packages

–

The ALVC125 has been designed with a ±24mA output driver. This

driver is capable of driving a moderate to heavy load while maintaining

speedperformance.

APPLICATIONS:

Drive Features for ALVC125:

–

High Output Drivers: ±24mA

Suitable for heavy loads

• 3.3VHighSpeedSystems

• 3.3Vandlowervoltagecomputingsystems

FUNCTIONALBLOCKDIAGRAM

¹OE

³OE

³Y

¹Y

¹A

³A

²OE

²A

⁴OE

⁴Y

²Y

⁴A

SEPTEMBER 2000

INDUSTRIAL TEMPERATURE RANGE

1999 Integrated Device Technology, Inc.

DSC-4635/-

12 3 4 5 6

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