5秒后页面跳转
捷配首页

Datasheet > IDT72V275L10PF9
IDT72V275L10PF9 PDF预览

IDT72V275L10PF9

更新时间： 2024-11-15 09:50:15
品牌 Logo 应用领域
艾迪悌 - IDT 先进先出芯片
页数 文件大小 规格书
25页 264K
描述
FIFO, 32KX18, 6.5ns, Synchronous, CMOS, PQFP64, PLASTIC, TQFP-64

阅读下载

中文翻译

获取价格

IDT72V275L10PF9 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Obsolete零件包装代码：QFP
包装说明：LQFP,针数：64
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.32.00.71风险等级：5.47
最长访问时间：6.5 ns周期时间：10 ns
JESD-30 代码：S-PQFP-G64JESD-609代码：e0
长度：14 mm内存密度：589824 bit
内存宽度：18湿度敏感等级：3
功能数量：1端子数量：64
字数：32768 words字数代码：32000
工作模式：SYNCHRONOUS最高工作温度：70 °C
最低工作温度：组织：32KX18
可输出：YES封装主体材料：PLASTIC/EPOXY
封装代码：LQFP封装形状：SQUARE
封装形式：FLATPACK, LOW PROFILE并行/串行：PARALLEL
峰值回流温度（摄氏度）：240认证状态：Not Qualified
座面最大高度：1.6 mm最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：3 V标称供电电压 (Vsup)：3.3 V
表面贴装：YES技术：CMOS
温度等级：COMMERCIAL端子面层：TIN LEAD
端子形式：GULL WING端子节距：0.8 mm
端子位置：QUAD处于峰值回流温度下的最长时间：20
宽度：14 mmBase Number Matches：1

IDT72V275L10PF9 数据手册

 浏览型号IDT72V275L10PF9的Datasheet PDF文件第2页浏览型号IDT72V275L10PF9的Datasheet PDF文件第3页浏览型号IDT72V275L10PF9的Datasheet PDF文件第4页浏览型号IDT72V275L10PF9的Datasheet PDF文件第5页浏览型号IDT72V275L10PF9的Datasheet PDF文件第6页浏览型号IDT72V275L10PF9的Datasheet PDF文件第7页 
3.3 VOLT CMOS SuperSync FIFO™  
32,768 x 18  
65,536 x 18  
IDT72V275  
IDT72V285  
Slim Thin Quad Flat Pack (STQFP)  
FEATURES:  
• High-performance submicron CMOS technology  
Industrial temperature range (-40°C to +85°C) is available  
• Choose among the following memory organizations:  
•
IDT72V275  
IDT72V285  
32,768 x 18  
65,536 x 18  
DESCRIPTION:  
• Pin-compatible with the IDT72V255/72V265 SuperSync FIFOs  
• 10ns read/write cycle time (6.5ns access time)  
• Fixed, low first word data latency time  
• Auto power down minimizes standby power consumption  
• Master Reset clears entire FIFO  
• Partial Reset clears data, but retains programmable  
settings  
• Retransmit operation with fixed, low first word data  
latency time  
• Empty, Full and Half-Full flags signal FIFO status  
• Programmable Almost-Empty and Almost-Full flags, each flag can  
default to one of two preselected offsets  
• Program partial flags by either serial or parallel means  
• Select IDT Standard timing (using EF and FF flags) or First Word  
Fall Through timing (using OR and IR flags)  
The IDT72V275/72V285 are exceptionally deep, high speed, CMOS  
First-In-First-Out (FIFO) memories with clocked read and write controls.  
These FIFOs offer numerous improvements over previous SuperSync  
FIFOs, includingthe following:  
• Thelimitationofthefrequencyofoneclockinputwithrespecttotheother  
has beenremoved. TheFrequencySelectpin(FS)has beenremoved,  
thusitisnolongernecessarytoselectwhichofthetwoclockinputs,RCLK  
or WCLK, is running at the higher frequency.  
• The period required by the retransmit operation is now fixed and short.  
• Thefirstworddatalatencyperiod,fromthetimethefirstwordiswrittento  
an empty FIFO to the time it can be read, is now fixed and short. (The  
variable clock cycle counting delay associated with the latency period  
found on previous SuperSync devices has been eliminated on this  
SuperSyncfamily.)  
•
Output enable puts data outputs into high impedance state  
• Easily expandable in depth and width  
• Independent Read and Write clocks (permit reading and writing  
simultaneously)  
SuperSyncFIFOsareparticularlyappropriatefornetwork,video,telecom-  
munications,datacommunicationsandotherapplicationsthatneedtobuffer  
largeamountsofdata.  
• Available in the 64-pin Thin Quad Flat Pack (TQFP) and the 64-pin  
FUNCTIONAL BLOCK DIAGRAM  
D0 -D17  
WEN  
WCLK  
LD  
SEN  
OFFSET REGISTER  
INPUT REGISTER  
FF/IR  
PAF  
EF/OR  
PAE  
FLAG  
LOGIC  
WRITE CONTROL  
LOGIC  
HF  
FWFT/SI  
RAM ARRAY  
32,768 x 18  
65,536 x 18  
WRITE POINTER  
READ POINTER  
READ  
CONTROL  
LOGIC  
RT  
OUTPUT REGISTER  
MRS  
PRS  
RESET  
LOGIC  
RCLK  
REN  
4512 drw 01  
Q0 -Q17  
OE  
IDTandtheIDTlogoaretrademarksofIntegratedDeviceTechnology, Inc. TheSuperSyncFIFOisatrademarkofIntegratedDeviceTechnology, Inc.  
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES  
APRIL 2001  
1
DSC-4512/2  
2001 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.  
1234567...25

中文翻译

下载PDF

与IDT72V275L10PF9相关器件

型号 品牌 获取价格 描述 数据表
IDT72V275L10PFG IDT

获取价格

 		FIFO, 32KX18, 6.5ns, Synchronous, CMOS, PQFP64, PLASTIC, TQFP-64
IDT72V275L10PFG8 IDT

获取价格

 		FIFO, 32KX18, 6.5ns, Synchronous, CMOS, PQFP64, PLASTIC, TQFP-64
IDT72V275L10PFI IDT

获取价格

 		3.3 VOLT CMOS SuperSync FIFO
IDT72V275L10TF IDT

获取价格

 		3.3 VOLT CMOS SuperSync FIFO
IDT72V275L10TF8 IDT

获取价格

 		FIFO, 32KX18, 6.5ns, Synchronous, CMOS, PQFP64, STQFP-64
IDT72V275L10TFI IDT

获取价格

 		3.3 VOLT CMOS SuperSync FIFO
IDT72V275L15PF IDT

获取价格

 		3.3 VOLT CMOS SuperSync FIFO
IDT72V275L15PF8 IDT

获取价格

 		FIFO, 32KX18, 10ns, Synchronous, CMOS, PQFP64, PLASTIC, TQFP-64
IDT72V275L15PF9 IDT

获取价格

 		FIFO, 32KX18, 10ns, Synchronous, CMOS, PQFP64, PLASTIC, TQFP-64
IDT72V275L15PFG IDT

获取价格

 		FIFO, 32KX18, 10ns, Synchronous, CMOS, PQFP64, PLASTIC, TQFP-64

与IDT72V275L10PF9相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证