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IDT72P51777L7-5BBI PDF预览

IDT72P51777L7-5BBI

更新时间： 2024-11-28 08:24:31
品牌 Logo 应用领域
艾迪悌 - IDT 先进先出芯片
页数 文件大小 规格书
88页 798K
描述
FIFO, 256KX40, 3.8ns, Asynchronous, CMOS, PBGA376

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中文翻译

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IDT72P51777L7-5BBI 数据手册

 浏览型号IDT72P51777L7-5BBI的Datasheet PDF文件第2页浏览型号IDT72P51777L7-5BBI的Datasheet PDF文件第3页浏览型号IDT72P51777L7-5BBI的Datasheet PDF文件第4页浏览型号IDT72P51777L7-5BBI的Datasheet PDF文件第5页浏览型号IDT72P51777L7-5BBI的Datasheet PDF文件第6页浏览型号IDT72P51777L7-5BBI的Datasheet PDF文件第7页 
1.8VMULTI-QUEUEFLOW-CONTROLDEVICES  
(128QUEUES)40BITWIDECONFIGURATION  
5,242,880bits  
10,485,760bits  
IDT72P51767  
IDT72P51777  
•
User Selectable Bus Matching Options:  
FEATURES  
– x40 in to x40 out  
– x40 in to x20 out  
– x20 in to x20 out  
– x20in to x40out  
•
Choose from among the following memory density options:  
IDT72P51767  
IDT72P51777  
Total Available Memory = 5,242,880 bits  
Total Available Memory = 10,485,760 bits  
•
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•
•
•
•
•
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•
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User selectable I/O: 1.5V HSTL or 1.8V eHSTL  
100% Bus Utilization, Read and Write on every clock cycle  
Selectable Back off one (BOI) or IDT standard mode of operation  
Ability to operate on packet or word boundaries  
Mark and Re-Write operation  
•
•
•
Configurable from 1 to 128 Queues  
Multiple default configurations of symmetrical queues  
Default multi-queue device configurations  
– IDT72P51767: 512 x 40 x 128Q  
Mark and Re-Read operation  
– IDT72P51777: 1,024 x 40 x 128Q  
Individual, Active queue flags (EF, FF, PAE, PAF)  
8 bit parallel flag status on both read and write ports  
Direct or polled operation of flag status bus  
Expansion of up to 256 queues  
•
Number of queues and queue sizes may be configured; at  
master reset, though serial programming, (via the queue  
address bus)  
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166 MHz High speed operation (6ns cycle time)  
0.48ns access time  
Independent Read and Write access per queue  
Echo Read Clock available  
Internal PLL  
On-chip Output Impedance matching  
JTAG Functionality (Boundary Scan)  
Available in a 376-pin BGA, 1mm pitch, 23mm x 23mm  
HIGH Performance submicron CMOS technology  
Industrial temperature range (-40°C to +85°C) is available  
Green parts available, seeing Ordering Information  
FUNCTIONALBLOCKDIAGRAM  
10G DDR MULTI-QUEUE FLOW-CONTROL DEVICE  
ECHO CLOCK  
2
RADEN  
Q127  
WADEN  
FSTR  
ESTR  
RDADD  
8
WRADD  
REN  
Q126  
Q125  
8
RCLK  
WEN  
EREN  
WCLK  
OE  
Q
out  
D
in  
x40 or x20  
DATA IN  
x40 or x20  
DATA OUT  
EF  
FF  
PAE  
PAF  
PAFn  
PAEn  
Q0  
8
8
6724 drw01  
CIDTOandMtheMIDTElogRoaCretrIaAdemLarksAofInNtegDratedIDNevicDeTUechSnolTogyR,InIcAL TEMPERATURE RANGES  
JANUARY 2006  
1
2006 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.  
DSC-6724/1  
1234567...88

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IDT72T18105L10BB IDT

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IDT72T18105L10BBI IDT

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IDT72T18105L39176BB IDT

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IDT72T18105L4-4BB IDT

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 		2.5 VOLT HIGH-SPEED TeraSync FIFO 18-BIT/9-BIT CONFIGURATIONS
IDT72T18105L4-4BBG IDT

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 		FIFO, 128KX18, 3.4ns, Synchronous, CMOS, PBGA240, 19 X 19 MM, 1 MM PITCH, PLASTIC, BGA-240
IDT72T18105L4-4BBI IDT

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 		2.5 VOLT HIGH-SPEED TeraSync FIFO 18-BIT/9-BIT CONFIGURATIONS
IDT72T18105L5BB IDT

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 		2.5 VOLT HIGH-SPEED TeraSync FIFO 18-BIT/9-BIT CONFIGURATIONS
IDT72T18105L5BBG IDT

获取价格

 		FIFO, 128KX18, 3.6ns, Synchronous, CMOS, PBGA240, 19 X 19 MM, 1 MM PITCH, PLASTIC, BGA-240
IDT72T18105L5BBGI IDT

获取价格

 		FIFO, 128KX18, 3.6ns, Synchronous, CMOS, PBGA240, 19 X 19 MM, 1 MM PITCH, PLASTIC, BGA-240

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