Datasheet > IDT72220L10TP

IDT72220L10TP

更新时间： 2024-11-11 23:58:15

品牌	Logo	应用领域
其他 - ETC		先进先出芯片
页数	文件大小	规格书
11页	89K
描述
x8 Synchronous FIFO

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IDT72220L10TP 数据手册

IDT72420

IDT72200

IDT72210

IDT72220

IDT72230

IDT72240

CMOS SyncFIFO™

64 x 8, 256 x 8,

512 x 8, 1,024 x 8,

2,048 x 8, 4,096 x 8

FEATURES:

• 64 x 8-bit organization (IDT72420)

DESCRIPTION:

TheIDT72420/72200/72210/72220/72230/72240SyncFIFO™arevery

• 256 x 8-bit organization (IDT72200)

• 512 x 8-bit organization (IDT72210)

high-speed, low-power First-In, First-Out (FIFO) memories with clocked

read and write controls. These devices have a 64, 256, 512, 1,024, 2,048,

and 4,096 x 8-bit memory array, respectively. These FIFOs are applicable

for a wide variety of data buffering needs, such as graphics, Local Area

Networks (LANs), and interprocessor communication.

These FIFOs have 8-bit input and output ports. The input port is

controlled by a free-running clock (WCLK), and a Write Enable pin (WEN).

Data is written into the Synchronous FIFO on every clock when WEN is

asserted. The output port is controlled by another clock pin (RCLK) and a

Read Enable pin (REN). The Read Clock can be tied to the Write Clock for

single clock operation or the two clocks can run asynchronous of one

another for dual clock operation. An Output Enable pin (OE) is provided on

the read port for three-state control of the output.

• 1,024 x 8-bit organization (IDT72220)

• 2,048 x 8-bit organization (IDT72230)

• 4,096 x 8-bit organization (IDT72240)

• 10 ns read/write cycle time (IDT72420/72200/72210/72220/72230/

72240)

• Read and Write Clocks can be asynchronous or coincidental

• Dual-Ported zero fall-through time architecture

• Empty and Full flags signal FIFO status

• Almost-Empty and Almost-Full flags set to Empty+7 and Full-7,

respectively

• Output enable puts output data bus in high-impedance state

• Produced with advanced submicron CMOS technology

• Available in 28-pin 300 mil plastic DIP

• For surface mount product please see the IDT72421/72201/72211/ provided for improved system control. The partial (AE) flags are set to

72221/72231/72241 data sheet

These Synchronous FIFOs have twoendpointflags, Empty(EF)andFull

(FF). Two partial flags, Almost-Empty (AE) and Almost-Full (AF), are

Empty+7 and Full-7 for AE and AF respectively.

These FIFOs are fabricated using IDT’s high-speed submicron CMOS

technology.

• Industrial temperature range (–40°C to +85°C) is available

FUNCTIONAL BLOCK DIAGRAM

D0 - D7

WCLK

WEN

INPUT REGISTER

FLAG

LOGIC

WRITE CONTROL

LOGIC

RAM ARRAY

64 x 8, 256 x 8,

512 x 8, 1,024 x 8,

2,048 x 8, 4,096 x 8

WRITE POINTER

READ POINTER

READ CONTROL

LOGIC

OUTPUT REGISTER

RESET LOGIC

RCLK

REN

2680 drw01

Q0 - Q7

TheIDTlogoisaregisteredtrademarkandtheSyncFIFOisatrademarkofIntegratedDeviceTechnology,Inc.

MAY 2001

COMMERCIAL TEMPERATURE RANGE

2001 Integrated Device Technology, Inc.

DSC-2680/1

12 3 4 5 6 7...11

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与IDT72220L10TP相关器件

型号	品牌	获取价格	描述	数据表
IDT72220L10TPG	IDT	获取价格	CMOS SyncFIFO
IDT72220L10TPSCDS-W	ETC	获取价格	x8 Synchronous FIFO
IDT72220L12TC	IDT	获取价格	CMOS SyncFIFOO 64 x 8, 256 x 8, 512 x 8, 1024 x 8, 2048 x 8 and 4096 x 8
IDT72220L12TCB	IDT	获取价格	CMOS SyncFIFOO 64 x 8, 256 x 8, 512 x 8, 1024 x 8, 2048 x 8 and 4096 x 8
IDT72220L12TP	IDT	获取价格	CMOS SyncFIFOO 64 x 8, 256 x 8, 512 x 8, 1024 x 8, 2048 x 8 and 4096 x 8
IDT72220L12TPB	IDT	获取价格	CMOS SyncFIFOO 64 x 8, 256 x 8, 512 x 8, 1024 x 8, 2048 x 8 and 4096 x 8
IDT72220L12TPSCDS-W	ETC	获取价格	x8 Synchronous FIFO
IDT72220L15SCDS-W	IDT	获取价格	FIFO, 1KX8, 10ns, Synchronous, CMOS, DIE
IDT72220L15TC	IDT	获取价格	CMOS SyncFIFOO 64 x 8, 256 x 8, 512 x 8, 1024 x 8, 2048 x 8 and 4096 x 8
IDT72220L15TCB	IDT	获取价格	CMOS SyncFIFOO 64 x 8, 256 x 8, 512 x 8, 1024 x 8, 2048 x 8 and 4096 x 8

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