Datasheet > IDT71V65803S100PFGI

IDT71V65803S100PFGI

更新时间： 2024-11-09 09:44:51

品牌	Logo	应用领域
艾迪悌 - IDT		静态存储器
页数	文件大小	规格书
26页	500K
描述
ZBT SRAM, 512KX18, 5ns, CMOS, PQFP100, PLASTIC, MO-136, TQFP-100

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256K x 36, 512K x 18

3.3V Synchronous ZBT™ SRAMs

ZBT™Feature

IDT71V65603

IDT71V65803

3.3V I/O, Burst Counter

PipelinedOutputs

Features

AddressandcontrolsignalsareappliedtotheSRAMduringoneclock

cycle,andtwocycleslatertheassociateddatacycleoccurs,beitreadorwrite.

TheIDT71V65603/5803containdataI/O,addressandcontrolsignal

registers.Outputenableistheonlyasynchronoussignalandcanbeused

todisabletheoutputsatanygiventime.

◆

256K x 36, 512K x 18 memory configurations

◆

Supports high performance system speed - 150MHz

(3.8ns Clock-to-Data Access)

ZBT Feature - No dead cycles between write and read cycles

Internally synchronized output buffer enable eliminates the

need to control OE

Single R/W (READ/WRITE) control pin

Positive clock-edge triggered address, data, and control

signal registers for fully pipelined applications

4-word burst capability (interleaved or linear)

Individual byte write (BW¹- BW⁴) control (May tie active)

Three chip enables for simple depth expansion

3.3V power supply (±5%)

3.3V I/O Supply (VDDQ)

Power down controlled by ZZ input

Packaged in a JEDEC standard 100-pin plastic thin quad

flatpack (TQFP), 119 ball grid array (BGA) and 165 fine pitch

ball grid array(fBGA).

◆

AClockEnable(CEN)pinallowsoperationoftheIDT71V65603/5803to

besuspendedaslongasnecessary.Allsynchronousinputsareignoredwhen

(CEN)ishighandtheinternaldeviceregisterswillholdtheirpreviousvalues.

Therearethreechipenablepins(CE1,CE2,CE2)thatallowtheuser

todeselectthedevicewhendesired.Ifanyoneofthesethreearenotasserted

whenADV/LDislow,nonewmemoryoperationcanbeinitiated.However,

anypendingdatatransfers(readsorwrites)willbecompleted.Thedatabus

willtri-statetwocyclesafterchipisdeselectedorawriteisinitiated.

TheIDT71V65603/5803haveanon-chipburstcounter.Intheburst

mode,theIDT71V65603/5803canprovidefourcyclesofdataforasingle

address presented to the SRAM. The order of the burst sequence is

defined by the LBO input pin. The LBO pin selects between linear and

interleaved burst sequence. The ADV/LDsignal is used to load a new

externaladdress(ADV/LD=LOW) orincrementtheinternalburstcounter

(ADV/LD = HIGH).

◆

Description

The IDT71V65603/5803 are 3.3V high-speed 9,437,184-bit

(9Megabit)synchronousSRAMS.Theyaredesignedtoeliminatedeadbus

cycleswhenturningthebusaroundbetweenreadsandwrites,orwritesand

The IDT71V65603/5803 SRAM utilize IDT's latest high-performance

CMOSprocess,andarepackagedinaJEDECStandard14mmx20mm100-

pinthinplasticquadflatpack(TQFP)aswellasa119ballgridarray(BGA)and

165 fine pitch ball grid array (fBGA).

reads.Thus,theyhavebeengiventhenameZBT ,orZeroBusTurnaround.

PinDescriptionSummary

A⁰-A¹⁸

Address Inputs

Input

I/O

Synchronous

Asynchronous

Synchronous

N/A

Chip Enables

CE , CE₂, CE

Output Enable

R/W

Read/Write Signal

Clock Enable

CEN

Individual Byte Write Selects

Clock

BW¹, BW², BW³, BW4

CLK

ADV/LD

Advance burst address / Load new address

Linear / Interleaved Burst Order

Sleep Mode

Synchronous

Static

LBO

Asynchronous

Synchronous

Static

I/O⁰-I/O³¹, I/O^P1-I/O^P4

V^DD, V^DDQ

Data Input / Output

Core Power, I/O Power

Ground

Supply

Static

5304 tbl 01

ZBT and Zero Bus Turnaround are trademarks of Integrated Device Technology, Inc. and the architecture is supported by Micron Technology and Motorola, Inc.

SEPTEMBER 2004

MARCH 2009

DSC-5304/06

12 3 4 5 6 7...26

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与IDT71V65803S100PFGI相关器件

型号	品牌	获取价格	描述	数据表
IDT71V65803S100PFGI8	IDT	获取价格	ZBT SRAM, 512KX18, 5ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, TQFP-100
IDT71V65803S100PFI	IDT	获取价格	256K x 36, 512K x 18 3.3V Synchronous ZBT SRAMs
IDT71V65803S100PFI8	IDT	获取价格	ZBT SRAM, 512KX18, 5ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, TQFP-100
IDT71V65803S133BG	IDT	获取价格	256K x 36, 512K x 18 3.3V Synchronous ZBT SRAMs
IDT71V65803S133BG8	IDT	获取价格	ZBT SRAM, 512KX18, 4.2ns, CMOS, PBGA119, BGA-119
IDT71V65803S133BGG	IDT	获取价格	ZBT SRAM, 512KX18, 4.2ns, CMOS, PBGA119, MS-028AA, BGA-119
IDT71V65803S133BGG8	IDT	获取价格	ZBT SRAM, 512KX18, 4.2ns, CMOS, PBGA119, 14 X 22 MM, PLASTIC, MO-028AA, BGA-119
IDT71V65803S133BGGI	IDT	获取价格	暂无描述
IDT71V65803S133BGGI8	IDT	获取价格	ZBT SRAM, 512KX18, 4.2ns, CMOS, PBGA119, 14 X 22 MM, PLASTIC, MO-028AA, BGA-119
IDT71V65803S133BGI	IDT	获取价格	256K x 36, 512K x 18 3.3V Synchronous ZBT SRAMs

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