5秒后页面跳转
IDT7132LA25JI8 PDF预览

IDT7132LA25JI8

更新时间: 2024-11-16 14:51:27
品牌 Logo 应用领域
艾迪悌 - IDT 静态存储器内存集成电路
页数 文件大小 规格书
15页 137K
描述
Dual-Port SRAM, 2KX8, 25ns, CMOS, PQCC52, PLASTIC, LCC-52

IDT7132LA25JI8 技术参数

是否无铅:含铅是否Rohs认证:不符合
生命周期:Obsolete零件包装代码:LCC
包装说明:PLASTIC, LCC-52针数:52
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.32.00.41风险等级:5.07
Is Samacsys:N最长访问时间:25 ns
I/O 类型:COMMONJESD-30 代码:S-PQCC-J52
JESD-609代码:e0长度:19.1262 mm
内存密度:16384 bit内存集成电路类型:DUAL-PORT SRAM
内存宽度:8湿度敏感等级:3
功能数量:1端口数量:2
端子数量:52字数:2048 words
字数代码:2000工作模式:ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:2KX8输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装等效代码:LDCC52,.8SQ封装形状:SQUARE
封装形式:CHIP CARRIER并行/串行:PARALLEL
峰值回流温度(摄氏度):225电源:5 V
认证状态:Not Qualified座面最大高度:4.572 mm
最大待机电流:0.004 A最小待机电流:2 V
子类别:SRAMs最大压摆率:0.22 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn85Pb15)端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:30宽度:19.1262 mm
Base Number Matches:1

IDT7132LA25JI8 数据手册

 浏览型号IDT7132LA25JI8的Datasheet PDF文件第2页浏览型号IDT7132LA25JI8的Datasheet PDF文件第3页浏览型号IDT7132LA25JI8的Datasheet PDF文件第4页浏览型号IDT7132LA25JI8的Datasheet PDF文件第5页浏览型号IDT7132LA25JI8的Datasheet PDF文件第6页浏览型号IDT7132LA25JI8的Datasheet PDF文件第7页 
HIGH SPEED  
2K x 8 DUAL PORT  
STATIC RAM  
IDT7132SA/LA  
IDT7142SA/LA  
Features  
MASTERIDT7132easilyexpands databus widthto16-or-more  
bits using SLAVE IDT7142  
High-speed access  
On-chip port arbitration logic (IDT7132 only)  
BUSY output flag on IDT7132; BUSY input on IDT7142  
Battery backup operation 2V data retention (LA only)  
TTL-compatible, single 5V ±10% power supply  
Available in 48-pin DIP, LCC and Flatpack, and 52-pin PLCC  
packages  
Military product compliant to MIL-PRF-38535 QML  
Industrial temperature range (–40°C to +85°C) is available for  
selected speeds  
Military: 25/35/55/100ns (max.)  
– Commercial: 20/25/35/55/100ns (max.)  
Low-power operation  
IDT7132/42SA  
Active: 325mW (typ.)  
Standby: 5mW (typ.)  
IDT7132/42LA  
Active: 325mW (typ.)  
Standby: 1mW (typ.)  
Functional Block Diagram  
OER  
OEL  
CEL  
CER  
R/WL  
R/WR  
I/OOL-I/O7L  
I/OOR-I/O7R  
I/O  
Control  
I/O  
Control  
m
(1,2)  
(1,2)  
BUSYL  
BUSYR  
A10L  
A10R  
A0R  
Address  
Decoder  
MEMORY  
ARRAY  
Address  
Decoder  
A0L  
11  
11  
ARBITRATION  
LOGIC  
CER  
OER  
R/WR  
CEL  
OEL  
R/WL  
2692 drw 01  
NOTES:  
1. IDT7132 (MASTER): BUSY is open drain output and requires pullup resistor of 270.  
IDT7142 (SLAVE): BUSY is input.  
2. Open drain output: requires pullup resistor of 270.  
JANUARY 2001  
1
DSC-2692/15  
©2000IntegratedDeviceTechnology,Inc.  

与IDT7132LA25JI8相关器件

型号 品牌 获取价格 描述 数据表
IDT7132LA25L48 IDT

获取价格

HIGH-SPEED 2K x 8 DUAL-PORT STATIC RAM
IDT7132LA25L48B IDT

获取价格

HIGH-SPEED 2K x 8 DUAL-PORT STATIC RAM
IDT7132LA25L48G IDT

获取价格

暂无描述
IDT7132LA25L48GB IDT

获取价格

暂无描述
IDT7132LA25L48GI IDT

获取价格

Dual-Port SRAM, 2KX8, 25ns, CMOS, CQCC48, 0.570 X 0.570 INCH, 0.680 INCH HEIGHT, GREEN, MS
IDT7132LA25L48I IDT

获取价格

HIGH-SPEED 2K x 8 DUAL-PORT STATIC RAM WITH INTERRUPTS
IDT7132LA25L52 ETC

获取价格

x8 Dual-Port SRAM
IDT7132LA25L52B ETC

获取价格

x8 Dual-Port SRAM
IDT7132LA25P IDT

获取价格

HIGH-SPEED 2K x 8 DUAL-PORT STATIC RAM
IDT7132LA25PB IDT

获取价格

HIGH-SPEED 2K x 8 DUAL-PORT STATIC RAM