Datasheet > IDT70V927L30PRFG

IDT70V927L30PRFG

更新时间： 2024-11-22 10:37:23

品牌	Logo	应用领域
艾迪悌 - IDT		静态存储器
页数	文件大小	规格书
14页	193K
描述
Dual-Port SRAM, 32KX16, 30ns, CMOS, PQFP128, TQFP-128

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中文翻译

获取价格

数据手册

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IDT70V927L30PRFG 数据手册

HIGH-SPEED 3.3V 32K x 16

SYNCHRONOUS

DUAL-PORT STATIC RAM

PRELIMINARY

IDT70V927S/L

Features

◆

True Dual-Ported memory cells which allow simultaneous

access of the same memory location

High-speed clock to data access

Commercial: 25/30ns

Full synchronous operation on both ports

4ns setup to clock and 1ns hold on all control, data, and

address inputs

◆

Data input, address, and control registers

Fast 25ns clock to data out

Low-power operation

IDT70V927S

Self-timed write allows fast cycle time

30ns cycle time, 33MHz operation

Active: 550mW (typ.)

Standby: 3.3mW (typ.)

IDT70V927L

Active: 550mW (typ.)

Standby: 660mW (typ.)

Flow-Through output mode

Counter enable and reset features

Dual chip enables allow for depth expansion without

additional logic

◆

Separate upper-byte and lower-byte controls for

multiplexed bus and bus matching compatibility

LVTTL- compatible, single 3.3V (±0.3V) power supply

Industrial temperature range (-40°C to +85°C) is available

for selected speeds

◆

Available in a 128 pin Thin Quad Flatpack

Functional Block Diagram

W_R

UBR

R/WL

UBL

CE_0L

CE1L

CE0R

CE1R

LBL

LB_R

OEL

OER

I/O_8R-I/O_15R

I/O0R-I/O7R

A14R

I/O8L-I/O15L

I/O0L-I/O7L

I/O

Control

I/O

Control

A14L

Counter/

Address

Reg.

Counter/

Address

Reg.

MEMORY

ARRAY

A_0R

A0L

CLK_R

ADSR

CNTENR

CLKL

ADS_L

CNTENL

CNTRST_L

CNTRST_R

3749 drw 01

SEPTEMBER 1999

DSC 3749/4

12 3 4 5 6 7...14

中文翻译

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IDT70V927S25PRF	IDT	获取价格	Dual-Port SRAM, 32KX16, 25ns, CMOS, PQFP128, TQFP-128
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IDT70V927S25PRF9	IDT	获取价格	Dual-Port SRAM, 32KX16, 25ns, CMOS, PQFP128, TQFP-128
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IDT70V927S30PRF	IDT	获取价格	Dual-Port SRAM, 32KX16, 30ns, CMOS, PQFP128, TQFP-128
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