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IDT709079L12PFG PDF预览

IDT709079L12PFG

更新时间: 2024-11-11 12:58:55
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
17页 306K
描述
Dual-Port SRAM, 32KX8, 25ns, CMOS, PQFP100, GREEN, TQFP-100

IDT709079L12PFG 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:QFP
包装说明:LFQFP, QFP100,.63SQ,20针数:100
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.41风险等级:5.59
Base Number Matches:1

IDT709079L12PFG 数据手册

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PRELIMINARY  
IDT709079S/L  
HIGH-SPEED 32K x 8  
SYNCHRONOUS  
DUAL-PORT STATIC RAM  
Features:  
True Dual-Ported memory cells which allow simultaneous  
access of the same memory location  
High-speed clock to data access  
– Commercial:9/12/15ns(max.)  
– Industrial: 12ns (max.)  
Dual chip enables allow for depth expansion without  
additional logic  
Full synchronous operation on both ports  
– 4ns setup to clock and 1ns hold on all control, data,  
and address inputs  
Low-power operation  
– Data input, address, and control registers  
– IDT709079S  
Fast 9ns clock to data out in the Pipelined output mode  
Active:950mW(typ.)  
Standby: 5mW (typ.)  
– IDT709079L  
Active:950mW(typ.)  
Standby: 1mW (typ.)  
Flow-Through or Pipelined output mode on either port via  
the FT/PIPER pin  
Counter enable and reset features  
– Self-timedwriteallowsfastcycletime  
– 15ns cycle time, 66MHz operation in the Pipelined  
output mode  
TTL- compatible, single 5V (±10%) power supply  
Industrial temperature range (–40°C to +85°C) is  
available for selected speeds  
Available in a 100 pin Thin Quad Flatpack (TQFP)  
FunctionalBlockDiagram  
R/W  
R
R
R/W  
L
OE  
OEL  
CE0R  
CE1R  
CE0L  
CE1L  
1
0
1
0
0/1  
0/1  
0
1
1
0
0/1  
0/1  
FT/PIPE  
L
FT/PIPE  
R
I/O0L - I/O7L  
I/O0R - I/O7R  
I/O  
Control  
I/O  
Control  
A
14R  
0R  
A
14L  
Counter/  
Address  
Reg.  
Counter/  
Address  
Reg.  
MEMORY  
ARRAY  
A
CLK  
ADS  
CNTEN  
CNTRST  
A
0L  
L
R
R
CLK  
ADS  
CNTEN  
CNTRST  
L
R
L
R
L
3495 drw 01  
DECEMBER 2002  
1
DSC 3495/8  
©2002IntegratedDeviceTechnology,Inc.  

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