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IDT7027S25PFI9 PDF预览

IDT7027S25PFI9

更新时间: 2024-10-27 15:34:43
品牌 Logo 应用领域
艾迪悌 - IDT 静态存储器内存集成电路
页数 文件大小 规格书
19页 181K
描述
Dual-Port SRAM, 32KX16, 25ns, CMOS, PQFP100, TQFP-100

IDT7027S25PFI9 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:QFP
包装说明:TQFP-100针数:100
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.41风险等级:5.3
最长访问时间:25 ns其他特性:INTERRUPT FLAG; SEMAPHORE; AUTOMATIC POWER-DOWN; LOW POWER STANDBY MODE
JESD-30 代码:S-PQFP-G100JESD-609代码:e0
长度:14 mm内存密度:524288 bit
内存集成电路类型:DUAL-PORT SRAM内存宽度:16
湿度敏感等级:3功能数量:1
端口数量:2端子数量:100
字数:32768 words字数代码:32000
工作模式:ASYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:32KX16
输出特性:3-STATE可输出:YES
封装主体材料:PLASTIC/EPOXY封装代码:LFQFP
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE, FINE PITCH
并行/串行:PARALLEL峰值回流温度(摄氏度):240
认证状态:Not Qualified座面最大高度:1.6 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:TIN LEAD端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:20宽度:14 mm
Base Number Matches:1

IDT7027S25PFI9 数据手册

 浏览型号IDT7027S25PFI9的Datasheet PDF文件第2页浏览型号IDT7027S25PFI9的Datasheet PDF文件第3页浏览型号IDT7027S25PFI9的Datasheet PDF文件第4页浏览型号IDT7027S25PFI9的Datasheet PDF文件第5页浏览型号IDT7027S25PFI9的Datasheet PDF文件第6页浏览型号IDT7027S25PFI9的Datasheet PDF文件第7页 
HIGH-SPEED  
32K x 16 DUAL-PORT  
STATIC RAM  
IDT7027S/L  
Features  
IDT7027 easily expands data bus width to 32 bits or more  
using the Master/Slave select when cascading more than  
one device  
M/S = VIH for BUSY output flag on Master,  
M/S = VIL for BUSY input on Slave  
True Dual-Ported memory cells which allow simultaneous  
access of the same memory location  
High-speed access  
– Commercial:15/20/25/35/55ns (max.)  
Industrial: 20/25ns (max.)  
Low-power operation  
Busy and Interrupt Flags  
On-chip port arbitration logic  
IDT7027S  
Full on-chip hardware support of semaphore signaling  
between ports  
Fully asynchronous operation from either port  
TTL-compatible, single 5V (±10%) power supply  
Available in 100-pin Thin Quad Flatpack (TQFP) and 108-pin  
Ceramic PinGridArray(PGA)  
Active: 750mW (typ.)  
Standby: 5mW (typ.)  
IDT7027L  
Active: 750mW (typ.)  
Standby: 1mW (typ.)  
Separate upper-byte and lower-byte control for bus  
Industrial temperature range (–40°C to +85°C) is available  
for selected speeds  
matching capability.  
Dual chip enables allow for depth expansion without  
external logic  
FunctionalBlockDiagram  
R/W  
L
R/  
WR  
UB  
L
UB  
R
CE0L  
CE0R  
CE1L  
CE1R  
OE  
LB  
R
OE  
LB  
L
L
R
I/O 8-15L  
I/O8-15R  
I/O0-7R  
I/O  
Control  
I/O  
Control  
0-7L  
I/O  
(1,2)  
R
BUSY  
BUSY  
L
.
32Kx16  
14L  
A
14R  
0R  
A
Address  
Decoder  
Address  
Decoder  
MEMORY  
ARRAY  
7027  
A0L  
A
A
14L  
A
A
CE0R  
14R  
0R  
A
CE0L  
0L  
ARBITRATION  
INTERRUPT  
SEMAPHORE  
LOGIC  
CE1L  
OE  
CE1R  
OE  
L
R
R/W  
L
R/W  
R
SEM  
INT  
L
L
SEM  
R
(2)  
(2)  
INTR  
M/S(2)  
3199 drw 01  
NOTES:  
1. BUSY is an input as a Slave (M/S=VIL) and an output as a Master (M/S=VIH).  
2. BUSY and INT are non-tri-state totem-pole outputs (push-pull).  
JULY 2004  
1
DSC 3199/8  
©2004 IntegratedDeviceTechnology,Inc.  

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