IDT70121S/L
IDT70125S/L
HIGH-SPEED
2K x 9 DUAL-PORT
STATIC RAM WITH BUSY & INTERRUPT
Integrated Device Technology, Inc.
FEATURES:
DESCRIPTION:
• High-speed access
The IDT70121/IDT70125 are high-speed 2K x 9 Dual-Port
Static RAMs. The IDT70121 is designed to be used as a
stand-alone9-bitDual-PortRAMorasa“MASTER”Dual-Port
RAM together with the IDT70125 “SLAVE” Dual-Port in 18-
bit-or-more word width systems. Using the IDT MASTER/
SLAVE Dual-Port RAM approach in 18-bit-or-wider memory
system applications results in full-speed, error-free operation
without the need for additional discrete logic.
– Commercial: 25/35/45/55ns (max.)
• Low-power operation
– IDT70121/70125S
Active: 500mW (typ.)
Standby: 5mW (typ.)
– IDT70121/70125L
Active: 500mW (typ.)
Standby: 1mW (typ.)
• Fully asychronous operation from either port
Both devices provide two independent ports with separate
control, address, and I/O pins that permit independent, asyn-
• MASTER IDT70121 easily expands data bus width to 18 chronousaccessforreadsorwritestoanylocationinmemory.
bits or more using SLAVE IDT70125 chip
• On-chip port arbitration logic (IDT70121 only)
• BUSY output flag on Master; BUSY input on Slave
• INT flag for port-to-port communication
• Battery backup operation—2V data retention
• TTL-compatible, signal 5V (±10%) power supply
• Available in 52-pin PLCC
An automatic power-down feature, controlled by CE, permits
the on-chip circuitry of each port to enter a very low standby
power mode.
The IDT70121/IDT70125 utilizes a 9-bit wide data path to
allow for Data/Control and parity bits at the user’s option. This
feature is especially useful in data communications
applications where it is necessary to use a parity bit for
• Industrial temperature range (–40°C to +85°C) is avail- transmission/reception error checking.
able, tested to military electrical specifications
FUNCTIONAL BLOCK DIAGRAM
OER
OEL
CE
R/W
L
CE
R
R/WR
L
I/O0L- I/O8L
I/O0R-I/O8R
(1,2)
I/O
Control
I/O
Control
BUSY (1,2)
L
BUSY
R
A
10L
A
11R
0R
Address
Decoder
MEMORY
ARRAY
Address
Decoder
A
0L
A
11
11
ARBITRATION
INTERRUPT
SEMAPHORE
LOGIC
CE
OE
R/W
L
CE
OE
R/W
R
NOTES:
L
R
1. 70121 (MASTER):
BUSY is non-tri-
stated push-pull
output.
R
L
70125 (SLAVE):
BUSY is input.
2. INT is totem-pole
output.
INT (2)
L
(2)
INT
2654 drw 01
R
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGE
OCTOBER 1996
©1996 Integrated Device Technology, Inc.
DSC-2654/4
For latest information contact IDT’s web site at www.idt.com or fax-on-demand at 408-492-8391.
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