Datasheet > 存储 > SRAM> IDT6116SA90DGB

IDT6116SA90DGB

更新时间： 2023-04-15 00:00:00

品牌	Logo	应用领域
艾迪悌 - IDT		静态存储器
页数	文件大小	规格书
12页	137K
描述
Standard SRAM, 2KX8, 90ns, CMOS, CDIP24, 0.600 INCH, CERAMIC, DIP-24

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数据手册

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IDT6116SA90DGB 数据手册

CMOS Static RAM

16K (2K x 8-Bit)

IDT6116SA

IDT6116LA

Features

Description

◆

High-speed access and chip select times

The IDT6116SA/LA is a 16,384-bit high-speed static RAM

organized as 2K x 8. It is fabricated using IDT's high-performance,

high-reliabilityCMOStechnology.

– Military:20/25/35/45/55/70/90/120/150ns(max.)

– Industrial:20/25/35/45ns(max.)

– Commercial:15/20/25/35/45ns(max.)

Low-power consumption

Battery backup operation

– 2V data retention voltage (LA version only)

Produced with advanced CMOS high-performance

technology

CMOS process virtually eliminates alpha particle soft-error consumesonly1µWto4µWoperatingoffa2Vbattery.

Access times as fastas 15ns are available. The circuitalsooffers a

reduced power standby mode. When CS goes HIGH, the circuit will

automatically go to, and remain in, a standby power mode, as long

as CS remains HIGH. This capability provides significant system level

power and cooling savings. The low-power (LA) version also offers a

battery backup data retention capability where the circuit typically

◆

rates

AllinputsandoutputsoftheIDT6116SA/LAareTTL-compatible.Fully

static asynchronous circuitry is used, requiring no clocks or refreshing

foroperation.

TheIDT6116SA/LAispackagedin24-pin600and300milplasticor

ceramicDIP,24-leadgull-wingSOIC,and24-leadJ-bendSOJproviding

highboard-levelpackingdensities.

◆

Input and output directly TTL-compatible

Static operation: no clocks or refresh required

Available in ceramic and plastic 24-pin DIP, 24-pin Thin Dip,

24-pin SOIC and 24-pin SOJ

◆

Military product compliant to MIL-STD-833, Class B

Military grade product is manufactured in compliance to the latest

version of MIL-STD-883, Class B, making it ideally suited to military

temperatureapplicationsdemandingthehighestlevelofperformanceand

reliability.

FunctionalBlockDiagram

128 X 128

MEMORY

ARRAY

ADDRESS

DECODER

GND

A ₁₀

I/O

I/O CONTROL

INPUT

DATA

CIRCUIT

I/O₇

CONTROL

CIRCUIT

3089 drw 01

NOVEMBER 2006

DSC-3089/06

12 3 4 5 6 7...12

中文翻译

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与IDT6116SA90DGB相关器件

型号	品牌	获取价格	描述	数据表
IDT6116SA90DI	IDT	获取价格	Standard SRAM, 2KX8, 90ns, CMOS, CDIP24
IDT6116SA90EB	IDT	获取价格	Standard SRAM, 2KX8, 90ns, CMOS, CDFP24, 0.300 INCH, CERPACK-24
IDT6116SA90FB	IDT	获取价格	Standard SRAM, 2KX8, 90ns, CMOS, CDFP24, FP-24
IDT6116SA90L24B	ETC	获取价格	x8 SRAM
IDT6116SA90L28B	IDT	获取价格	Standard SRAM, 2KX8, 90ns, CMOS, CQCC28, LCC-28
IDT6116SA90L28BG8	IDT	获取价格	Standard SRAM, 2KX8, 90ns, CMOS, CQCC28, LCC-28
IDT6116SA90L32B	IDT	获取价格	Standard SRAM, 2KX8, 90ns, CMOS, CQCC32, LCC-32
IDT6116SA90P	IDT	获取价格	CMOS STATIC RAM 16K (2K x 8 BIT)
IDT6116SA90PB	IDT	获取价格	CMOS STATIC RAM 16K (2K x 8 BIT)
IDT6116SA90SO	IDT	获取价格	CMOS STATIC RAM 16K (2K x 8 BIT)