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IDT6116SA150EB PDF预览

IDT6116SA150EB

更新时间: 2024-11-27 20:32:59
品牌 Logo 应用领域
艾迪悌 - IDT 静态存储器内存集成电路
页数 文件大小 规格书
10页 95K
描述
Standard SRAM, 2KX8, 150ns, CMOS, CDFP24, 0.300 INCH, CERPACK-24

IDT6116SA150EB 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DFP包装说明:0.300 INCH, CERPACK-24
针数:24Reach Compliance Code:not_compliant
ECCN代码:3A001.A.2.CHTS代码:8542.32.00.41
风险等级:5.71Is Samacsys:N
最长访问时间:150 nsI/O 类型:COMMON
JESD-30 代码:R-GDFP-F24JESD-609代码:e0
长度:15.748 mm内存密度:16384 bit
内存集成电路类型:STANDARD SRAM内存宽度:8
功能数量:1端口数量:1
端子数量:24字数:2048 words
字数代码:2000工作模式:ASYNCHRONOUS
最高工作温度:125 °C最低工作温度:-55 °C
组织:2KX8输出特性:3-STATE
可输出:YES封装主体材料:CERAMIC, GLASS-SEALED
封装代码:DFP封装等效代码:FL24,.4
封装形状:RECTANGULAR封装形式:FLATPACK
并行/串行:PARALLEL电源:5 V
认证状态:Not Qualified筛选级别:38535Q/M;38534H;883B
座面最大高度:2.286 mm最大待机电流:0.01 A
最小待机电流:4.5 V子类别:SRAMs
最大压摆率:0.09 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:FLAT端子节距:1.27 mm
端子位置:DUAL宽度:9.144 mm
Base Number Matches:1

IDT6116SA150EB 数据手册

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IDT6116SA  
IDT6116LA  
CMOS STATIC RAM  
16K (2K x 8 BIT)  
Integrated Device Technology, Inc.  
FEATURES:  
DESCRIPTION:  
• High-speed access and chip select times  
— Military: 20/25/35/45/55/70/90/120/150ns (max.)  
— Commercial: 15/20/25/35/45ns (max.)  
• Low-power consumption  
The IDT6116SA/LA is a 16,384-bit high-speed static RAM  
organized as 2K x 8. It is fabricated using IDT's high-perfor-  
mance, high-reliability CMOS technology.  
Access times as fast as 15ns are available. The circuit also  
offers a reduced power standby mode. When CSgoes HIGH,  
the circuit will automatically go to, and remain in, a standby  
power mode, as long as CS remains HIGH. This capability  
provides significant system level power and cooling savings.  
The low-power (LA) version also offers a battery backup data  
retention capability where the circuit typically consumes only  
1µW to 4µW operating off a 2V battery.  
• Battery backup operation  
— 2V data retention voltage (LA version only)  
• Produced with advanced CMOS high-performance  
technology  
• CMOS process virtually eliminates alpha particle  
soft-error rates  
• Input and output directly TTL-compatible  
• Static operation: no clocks or refresh required  
• Available in standard 24-pin DIP, 24-pin Thin Dip and  
All inputs and outputs of the IDT6116SA/LA are TTL-  
compatible. Fullystaticasynchronouscircuitryisused, requir-  
Plastic DIP, 28- and 32-pin LCC, 24-pin SOIC, 24-lead ing no clocks or refreshing for operation.  
CERPACK and 24-pin SOJ  
The IDT6116SA/LA is packaged in 24-pin 600 and 300 mil  
• Military product compliant to MIL-STD-833, Class B  
plastic or ceramic DIP, 28- and 32-pin leadless chip carriers,  
24-lead CERPACK, and a 24-lead gull-wing SOIC, providing  
high board-level packing densities.  
Militarygradeproductismanufacturedincompliancetothe  
latest version of MIL-STD-883, Class B, making it ideally  
suited to military temperature applications demanding the  
highest level of performance and reliability.  
FUNCTIONAL BLOCK DIAGRAM  
A 0  
VCC  
128 X 128  
ADDRESS  
DECODER  
MEMORY  
GND  
ARRAY  
A 10  
I/O 0  
I/O CONTROL  
INPUT  
DATA  
CIRCUIT  
I/O7  
CS  
OE  
WE  
CONTROL  
CIRCUIT  
3089 drw 01  
The IDT logo is aregistered trademark of Integrated Device Technology, Inc.  
MILITARY AND COMMERCIAL TEMPERATURE RANGES  
MAY 1994  
1994 Integrated Device Technology, Inc.  
DSC-1120/-  
5.4  
1

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