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IDT54FCT621ATLB PDF预览

IDT54FCT621ATLB

更新时间: 2024-11-15 23:08:19
品牌 Logo 应用领域
艾迪悌 - IDT 总线驱动器总线收发器逻辑集成电路输出元件
页数 文件大小 规格书
6页 71K
描述
FAST CMOS OCTAL BUS TRANSCEIVER (OPEN DRAIN)

IDT54FCT621ATLB 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:QLCC包装说明:QCCN, LCC20,.35SQ
针数:20Reach Compliance Code:not_compliant
风险等级:5.89其他特性:WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION
控制类型:INDEPENDENT CONTROL计数方向:BIDIRECTIONAL
系列:FCTJESD-30 代码:S-CQCC-N20
JESD-609代码:e0长度:8.89 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS TRANSCEIVER
最大I(ol):0.048 A位数:8
功能数量:1端口数量:2
端子数量:20最高工作温度:125 °C
最低工作温度:-55 °C输出特性:OPEN-DRAIN
输出极性:TRUE封装主体材料:CERAMIC, METAL-SEALED COFIRED
封装代码:QCCN封装等效代码:LCC20,.35SQ
封装形状:SQUARE封装形式:CHIP CARRIER
峰值回流温度(摄氏度):225电源:5 V
Prop。Delay @ Nom-Sup:12.5 ns传播延迟(tpd):7.6 ns
认证状态:Not Qualified筛选级别:38535Q/M;38534H;883B
座面最大高度:2.54 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Tin/Lead (Sn/Pb)端子形式:NO LEAD
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:30翻译:N/A
宽度:8.89 mmBase Number Matches:1

IDT54FCT621ATLB 数据手册

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IDT54/74FCT621T/AT  
FAST CMOS  
OCTAL BUS TRANSCEIVER  
(OPEN DRAIN)  
Integrated Device Technology, Inc.  
DESCRIPTION:  
FEATURES:  
• Std. and A speed grades  
The IDT54/74FCT621T/AT is an octal transceiver with  
non-inverting Open-Drain bus compatible outputs in both  
send and receive directions. The B bus outputs are capable  
of sinking 64mA providing very good capacitive drive  
characteristics. Theseoctalbustransceiversaredesignedfor  
asynchronous two-way communication between data buses.  
The control function implementation allows for maximum  
flexibility in timing.  
• Low input and output leakage 1µA (max.)  
• CMOS power levels  
• True TTL input and output compatibility  
– VOH = 3.3V (typ.)  
– VOL = 0.3V (typ.)  
• Power off disable outputs permit “live insertion”  
• Meets or exceeds JEDEC standard 18 specifications  
• Product available in Radiation Tolerant and Radiation  
Enhanced versions  
• Military product compliant to MIL-STD-883, Class B  
and DESC listed (dual marked)  
• Available in DIP, SOIC, CERPACK and LCC packages  
FUNCTIONAL BLOCK DIAGRAM (1)  
PIN CONFIGURATIONS  
1
2
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
GAB  
Vcc  
GBA  
A
A
1
GBA  
GAB  
3
2
B
B
B
B
B
B
B
B
1
2
3
4
5
6
7
8
P20-1,  
D20-1,  
SO20-2  
&
4
A
A
A
A
A
A
3
5
4
6
5
6
7
8
E20-1  
7
8
1
A
B1  
9
10  
GND  
2538 drw 02  
DIP/SOIC/CERPACK  
TOP VIEW  
INDEX  
3
2
20 19  
18  
A
A
A
A
A
3
4
5
6
7
4
5
6
7
8
B
B
B
B
B
1
2
3
4
5
A
2
–A  
8
B2–B8  
1
17  
16  
15  
14  
L20-2  
7 Other Transceivers  
2538 drw 01  
10 11 12 13  
9
2538 drw 03  
LCC  
TOP VIEW  
The IDT logo is a registered trademark of Integreted Device Technology, Inc.  
MILITARY AND COMMERCIAL TEMPERATURE RANGES  
APRIL 1994  
1995 Integrated Device Technology, Inc.  
6.18  
DSC-4222/4  
1

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