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IDT54FCT16374ETE PDF预览

IDT54FCT16374ETE

更新时间: 2024-01-13 04:46:00
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
8页 127K
描述
FAST CMOS 16-BIT REGISTER (3-STATE)

IDT54FCT16374ETE 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DFP包装说明:DFP, FL48,.4,25
针数:48Reach Compliance Code:not_compliant
风险等级:5.08系列:FCT
JESD-30 代码:R-GDFP-F48JESD-609代码:e0
长度:15.875 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.048 A
位数:8功能数量:2
端口数量:2端子数量:48
最高工作温度:125 °C最低工作温度:-55 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DFP
封装等效代码:FL48,.4,25封装形状:RECTANGULAR
封装形式:FLATPACK峰值回流温度(摄氏度):225
电源:5 VProp。Delay @ Nom-Sup:11 ns
传播延迟(tpd):11 ns认证状态:Not Qualified
筛选级别:MIL-STD-883 Class B座面最大高度:2.413 mm
子类别:FF/Latches最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:FLAT端子节距:0.635 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
触发器类型:POSITIVE EDGE宽度:9.652 mm
Base Number Matches:1

IDT54FCT16374ETE 数据手册

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IDT54/74FCT16374T/AT/CT/ET  
IDT54/74FCT162374T/AT/CT/ET  
FAST CMOS 16-BIT  
REGISTER (3-STATE)  
Integrated Device Technology, Inc.  
FEATURES:  
• Common features:  
– 0.5 MICRON CMOS Technology  
– High-speed, low-power CMOS replacement for  
ABT functions  
Typical tSK(o) (Output Skew) < 250ps  
– Low input and output leakage 1µA (max.)  
– ESD > 2000V per MIL-STD-883, Method 3015;  
> 200V using machine model (C = 200pF, R = 0)  
– Packages include 25 mil pitch SSOP, 19.6 mil pitch  
TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack  
– Extended commercial range of -40°C to +85°C  
– VCC = 5V ±10%  
• Features for FCT16374T/AT/CT/ET:  
– High drive outputs (-32mA IOH, 64mA IOL)  
– Power off disable outputs permit “live insertion”  
– Typical VOLP (Output Ground Bounce) < 1.0V at  
VCC = 5V, TA = 25°C  
DESCRIPTION:  
The FCT16374T/AT/CT/ET and FCT162374T/AT/CT/ET  
16-bit edge-triggered D-type registers are built using ad-  
vanced dual metal CMOS technology. These high-speed,  
low-power registers are ideal for use as buffer registers for  
data synchronization and storage. The Output Enable (xOE)  
and clock (xCLK) controls are organized to operate each  
device as two 8-bit registers or one 16-bit register with  
common clock. Flow-through organization of signal pins sim-  
plifies layout. All inputs are designed with hysteresis for  
improved noise margin.  
The FCT16374T/AT/CT/ET are ideally suited for driving  
high-capacitance loads and low-impedance backplanes. The  
output buffers are designed with power off disable capability  
to allow "live insertion" of boards when used as backplane  
drivers.  
The FCT162374T/AT/CT/ET have balanced output drive  
with current limiting resistors. This offers low ground bounce,  
minimal undershoot, and controlled output fall times– reduc-  
ing the need for external series terminating resistors. The  
FCT162374T/AT/CT/ET are plug-in replacements for the  
FCT16374T/AT/CT/ETandABT16374foron-boardbusinter-  
face applications.  
• Features for FCT162374T/AT/CT/ET:  
– Balanced Output Drivers: ±24mA (commercial),  
±16mA (military)  
– Reduced system switching noise  
– Typical VOLP (Output Ground Bounce) < 0.6V at  
VCC = 5V,TA = 25°C  
FUNCTIONAL BLOCK DIAGRAM  
2OE  
1OE  
1CLK  
2CLK  
1D1  
2D1  
D
C
D
C
2O1  
1O1  
TO 7 OTHER CHANNELS  
TO 7 OTHER CHANNELS  
2542 drw 01  
2542 drw 01  
The IDT logo is a registered trademark of Integrated Device Technology, Inc.  
MILITARY AND INDUSTRIAL TEMPERATURE RANGES  
FEBRUARY 1997  
1997 Integrated Device Technology, Inc.  
5.8  
DSC-2542/9  
For the latest information regarding this part, please contact IDT's web site at http://www.idt.com or fax-on-demand service at (US)1-800-9-IDT-FAX / (International) 408-492-8391.  
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