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IDT54FCT162841CTPVB PDF预览

IDT54FCT162841CTPVB

更新时间: 2024-11-18 23:12:43
品牌 Logo 应用领域
艾迪悌 - IDT 锁存器
页数 文件大小 规格书
9页 139K
描述
FAST CMOS 20-BIT TRANSPARENT LATCHES

IDT54FCT162841CTPVB 数据手册

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IDT54/74FCT16841AT/BT/CT/ET  
IDT54/74FCT162841AT/BT/CT/ET  
FAST CMOS 20-BIT  
TRANSPARENT  
LATCHES  
Integrated Device Technology, Inc.  
DESCRIPTION:  
FEATURES:  
The FCT16841AT/BT/CT/ET and FCT162841AT/BT/CT/  
ET 20-bit transparent D-type latches are built using advanced  
dual metal CMOS technology. These high-speed, low-power  
latches are ideal for temporary storage of data. They can be  
used for implementing memory address latches, I/O ports,  
andbusdrivers.TheOutputEnableandLatchEnablecontrols  
are organized to operate each device as two 10-bit latches or  
one 20-bit latch. Flow-through organization of signal pins  
simplifies layout. All inputs are designed with hysteresis for  
improved noise margin.  
The FCT16841AT/BT/CT/ET are ideally suited for driving  
high-capacitance loads and low-impedance backplanes. The  
output buffers are designed with power off disable capability  
to allow "live insertion" of boards when used as backplane  
drivers.  
The FCT162841AT/BT/CT/ET have balanced output drive  
with current limiting resistors. This offers low ground bounce,  
minimalundershoot,andcontrolledoutputfalltimes–reducing  
the need for external series terminating resistors. The  
FCT162841AT/BT/CT/ET are plug-in replacements for the  
FCT16841AT/BT/CT/ET and ABT16841 for on-board inter-  
face applications.  
• Common features:  
– 0.5 MICRON CMOS Technology  
– High-speed, low-power CMOS replacement for  
ABT functions  
Typical tSK(o) (Output Skew) < 250ps  
– Low input and output leakage 1µA (max.)  
– ESD > 2000V per MIL-STD-883, Method 3015;  
> 200V using machine model (C = 200pF, R = 0)  
– Packages include 25 mil pitch SSOP, 19.6 mil pitch  
TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack  
– Extended commercial range of -40°C to +85°C  
– VCC = 5V ±10%  
• Features for FCT16841AT/BT/CT/ET:  
– High drive outputs (-32mA IOH, 64mA IOL)  
– Power off disable outputs permit “live insertion”  
– Typical VOLP (Output Ground Bounce) < 1.0V at  
VCC = 5V, TA = 25°C  
• Features for FCT162841AT/BT/CT/ET:  
– Balanced Output Drivers: ±24mA (commercial),  
±16mA (military)  
– Reduced system switching noise  
– Typical VOLP (Output Ground Bounce) < 0.6V at  
VCC = 5V,TA = 25°C  
FUNCTIONAL BLOCK DIAGRAM  
2OE  
2LE  
1OE  
1LE  
1D1  
2D1  
D
C
D
1Q1  
2Q1  
C
TO 9 OTHER CHANNELS  
TO 9 OTHER CHANNELS  
2556 drw 02  
2556 drw 01  
The IDT logo is a registered trademark of Integrated Device Technology, Inc.  
MILITARY AND COMMERCIAL TEMPERATURE RANGES  
JULY 1996  
1996 Integrated Device Technology, Inc.  
5.18  
DSC-2556/7  
1

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Registered Bus Transceiver, FCT Series, 2-Func, 8-Bit, True Output, CMOS, CDFP56, CERPACK-