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IDT54FCT162823ETPAB PDF预览

IDT54FCT162823ETPAB

更新时间: 2024-11-26 23:12:43
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
9页 161K
描述
FAST CMOS 18-BIT REGISTER

IDT54FCT162823ETPAB 数据手册

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IDT54/74FCT16823AT/BT/CT/ET  
IDT54/74FCT162823AT/BT/CT/ET  
FAST CMOS 18-BIT  
REGISTER  
Integrated Device Technology, Inc.  
FEATURES:  
• Common features:  
– 0.5 MICRON CMOS Technology  
– High-speed, low-power CMOS replacement for  
ABT functions  
DESCRIPTION:  
The FCT16823AT/BT/CT/ET and FCT162823AT/BT/CT/  
ET 18-bit bus interface registers are built using advanced,  
dual metal CMOS technology. These high-speed, low-power  
registers with clock enable (xCLKEN) and clear (xCLR) con-  
trols are ideal for parity bus interfacing in high-performance  
synchronous systems. The control inputs are organized to  
operate the device as two 9-bit registers or one 18-bit register.  
Flow-through organization of signal pins simplifies layout. All  
inputs are designed with hysteresis for improved noise mar-  
gin.  
The FCT16823AT/BT/CT/ET are ideally suited for driving  
high-capacitance loads and low-impedance backplanes. The  
output buffers are designed with power off disable capability  
to allow "live insertion" of boards when used as backplane  
drivers.  
The FCT162823AT/BT/CT/ET have balanced output drive  
with current limiting resistors. This offers low ground bounce,  
minimal undershoot, and controlled output fall times – reduc-  
ing the need for external series terminating resistors. The  
FCT162823AT/BT/CT/ET are plug-in replacements for the  
FCT16823AT/BT/CT/ET and ABT16823 for on-board inter-  
face applications.  
Typical tSK(o) (Output Skew) < 250ps  
– Low input and output leakage 1µA (max.)  
– ESD > 2000V per MIL-STD-883, Method 3015;  
> 200V using machine model (C = 200pF, R = 0)  
– Packages include 25 mil pitch SSOP, 19.6 mil pitch  
TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack  
– Extended commercial range of -40°C to +85°C  
– VCC = 5V ±10%  
• Features for FCT16823AT/BT/CT/ET:  
– High drive outputs (-32mA IOH, 64mA IOL)  
– Power off disable outputs permit “live insertion”  
– Typical VOLP (Output Ground Bounce) < 1.0V at  
VCC = 5V, TA = 25°C  
• Features for FCT162823AT/BT/CT/ET:  
– Balanced Output Drivers: ±24mA (commercial),  
±16mA (military)  
– Reduced system switching noise  
– Typical VOLP (Output Ground Bounce) < 0.6V at  
VCC = 5V,TA = 25°C  
FUNCTIONAL BLOCK DIAGRAM  
1OE  
1CLR  
2OE  
2CLR  
1CLK  
2CLK  
1CLKEN  
2CLKEN  
R
C
R
C
1Q1  
2Q1  
D
D
1D1  
2D1  
TO 8 OTHER CHANNELS  
2772 drw 01  
2772 drw 02  
TO 8 OTHER CHANNELS  
The IDT logo is a registered trademark of Integrated Device Technology, Inc.  
MILITARY AND COMMERCIAL TEMPERATURE RANGES  
AUGUST 1996  
1996 Integrated Device Technology, Inc.  
5.16  
DSC-2772/8  
1

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