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IDT54FCT162652TPVB

更新时间： 2024-11-23 23:12:43

品牌	Logo	应用领域
艾迪悌 - IDT		总线收发器
页数	文件大小	规格书
9页	184K
描述
FAST CMOS 16-BIT BUS TRANSCEIVER/ REGISTERS

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IDT54/74FCT16652T/AT/CT/ET

IDT54/74FCT162652T/AT/CT/ET

FAST CMOS 16-BIT BUS

TRANSCEIVER/

REGISTERS

Integrated Device Technology, Inc.

vicesareorganizedastwoindependent8-bitbustransceivers

with 3-state D-type registers. For example, the xOEAB and

xOEBA signals control the transceiver functions.

The xSAB and xSBA control pins are provided to select

either real time or stored data transfer. The circuitry used for

select control will eliminate the typical decoding glitch that

occurs in a multiplexer during the transition between stored

and real time data. A LOW input level selects real-time data

and a HIGH level selects stored data.

Data on the A or B data bus, or both, can be stored in the

internal D-flip-flops by LOW-to-HIGH transitions at the appro-

priate clock pins (xCLKAB or xCLKBA), regardless of the

select or enable control pins. Flow-through organization of

signal pins simplifies layout. All inputs are designed with

hysteresis for improved noise margin.

The FCT16652T/AT/CT/ET are ideally suited for driving

high capacitance loads and low-impedance backplanes. The

output buffers are designed with power off disable capability

to allow "live insertion" of boards when used as backplane

drivers.

FEATURES:

• Common features:

– 0.5 MICRON CMOS Technology

– High-speed, low-power CMOS replacement for

ABT functions

– Typical tSK(o) (Output Skew) < 250ps

– Low input and output leakage ≤1µA (max.)

– ESD > 2000V per MIL-STD-883, Method 3015;

> 200V using machine model (C = 200pF, R = 0)

– Packages include 25 mil pitch SSOP, 19.6 mil pitch

TSSOP,15.7 mil pitch TVSOP and 25 mil pitch Cerpack

– Extended commercial range of -40°C to +85°C

– VCC = 5V ±10%

• Features for FCT16652T/AT/CT/ET:

– High drive outputs (-32mA IOH, 64mA IOL)

– Power off disable outputs permit “live insertion”

– Typical VOLP (Output Ground Bounce) < 1.0V at

VCC = 5V, TA = 25°C

• Features for FCT162652T/AT/CT/ET:

– Balanced Output Drivers: ±24mA (commercial),

±16mA (military)

– Reduced system switching noise

– Typical VOLP (Output Ground Bounce) < 0.6V at

VCC = 5V,TA = 25°C

The FCT162652T/AT/CT/ET have balanced output drive

with current limiting resistors. This offers low ground bounce,

minimalundershoot,andcontrolledoutputfalltimes–reducing

the need for external series terminating resistors. The

FCT162652T/AT/CT/ET are plug-in replacements for the

FCT16652T/AT/CT/ETandABT16652foron-boardbusinter-

face applications.

DESCRIPTION:

The FCT16652T/AT/CT/ET and FCT162652T/AT/CT/ET

16-bit registered transceivers are built using advanced dual

metal CMOS technology. These high-speed, low-power de-

FUNCTIONAL BLOCK DIAGRAM

2OEAB

OEAB

OEBA

CLKBA

SBA

CLKAB

2OEBA

2CLKBA

2SBA

2CLKAB

2SAB

SAB

B REG

2B1

1B1

A REG

2A1

1A1

TO 7 OTHER CHANNELS

2549 drw 02

2549 drw 01

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

MILITARY AND COMMERCIAL TEMPERATURE RANGE

AUGUST 1996

1996 Integrated Device Technology, Inc.

DSC-2549/8

12 3 4 5 6 7...9

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与IDT54FCT162652TPVB相关器件

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IDT54FCT162701AT	IDT	获取价格	FAST CMOS 18-BIT R/W BUFFER
IDT54FCT162701ATE	IDT	获取价格	FIFO, 4X18, 5.2ns, Synchronous, CMOS, CDFP56, 0.635 MM PITCH, CERPACK-56
IDT54FCT162701ATEB	IDT	获取价格	暂无描述
IDT54FCT162701T	IDT	获取价格	FAST CMOS 18-BIT R/W BUFFER
IDT54FCT162701TEB	IDT	获取价格	FIFO, 4X18, 6ns, Synchronous, CMOS, CDFP56, CERPACK-56
IDT54FCT16270ATE	IDT	获取价格	FAST CMOS 18-BIT R/W BUFFER
IDT54FCT16270ATEB	IDT	获取价格	FAST CMOS 18-BIT R/W BUFFER
IDT54FCT16270ATPA	IDT	获取价格	FAST CMOS 18-BIT R/W BUFFER
IDT54FCT16270ATPAB	IDT	获取价格	FAST CMOS 18-BIT R/W BUFFER
IDT54FCT16270ATPF	IDT	获取价格	FAST CMOS 18-BIT R/W BUFFER

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