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IDT54FCT162500ETPFB

更新时间： 2024-11-19 23:12:43

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
8页	126K
描述
FAST CMOS 18-BIT REGISTERED TRANSCEIVER

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IDT54/74FCT16500AT/CT/ET

IDT54/74FCT162500AT/CT/ET

FAST CMOS

18-BIT REGISTERED

TRANSCEIVER

Integrated Device Technology, Inc.

bitregisteredtransceiversarebuiltusingadvanceddualmetal

CMOS technology. These high-speed, low-power 18-bit reg-

istered bus transceivers combine D-type latches and D-type

flip-flopstoallowdataflowintransparent, latchedandclocked

modes. Data flow in each direction is controlled by output-

enable (OEAB and OEBA), latch enable (LEAB and LEBA)

and clock (CLKAB and CLKBA) inputs. For A-to-B data flow,

thedeviceoperatesintransparentmodewhenLEABisHIGH.

When LEAB is LOW, the A data is latched if CLKAB is held at

a HIGH or LOW logic level. If LEAB is LOW, the A bus data is

stored in the latch/flip-flop on the HIGH-to-LOW transition of

CLKAB. OEAB performs the output enable function on the B

port. Data flow from B port to A port is similar but uses OEBA,

LEBA and CLKBA. Flow-through organization of signal pins

simplifies layout. All inputs are designed with hysteresis for

improved noise margin.

FEATURES:

• Common features:

– 0.5 MICRON CMOS Technology

– High-speed, low-power CMOS replacement for

ABT functions

– Typical tSK(o) (Output Skew) < 250ps

– Low input and output leakage ≤1µA (max.)

– ESD > 2000V per MIL-STD-883, Method 3015;

> 200V using machine model (C = 200pF, R = 0)

– Packages include 25 mil pitch SSOP, 19.6 mil pitch

TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack

– Extended commercial range of -40°C to +85°C

– VCC = 5V ±10%

• Features for FCT16500AT/CT/ET:

– High drive outputs (-32mA IOH, 64mA IOL)

– Power off disable outputs permit “live insertion”

– Typical VOLP (Output Ground Bounce) < 1.0V at

VCC = 5V, TA = 25°C

The FCT16500AT/CT/ET are ideally suited for driving

high-capacitance loads and low-impedance backplanes. The

output buffers are designed with power off disable capability

to allow "live insertion" of boards when used as backplane

drivers.

• Features for FCT162500AT/CT/ET:

– Balanced Output Drivers: ±24mA (commercial),

±16mA (military)

The FCT162500AT/CT/ET have balanced output drive

with current limiting resistors. This offers low ground bounce,

minimalundershoot,andcontrolledoutputfalltimes–reducing

the need for external series terminating resistors. The

FCT162500AT/CT/ET are plug-in replacements for the

FCT16500AT/CT/ET and ABT16500 for on-board bus inter-

face applications.

– Reduced system switching noise

– Typical VOLP (Output Ground Bounce) < 0.6V at

VCC = 5V,TA = 25°C

DESCRIPTION:

The FCT16500AT/CT/ET and FCT162500AT/CT/ET 18-

FUNCTIONAL BLOCK DIAGRAM

OEAB

CLKBA

LEBA

OEBA

CLKAB

LEAB

TO 17 OTHER CHANNELS

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

2548 drw 01

MILITARY AND COMMERCIAL TEMPERATURE RANGES

AUGUST 1996

1996 Integrated Device Technology, Inc.

5.9

DSC-2548/7

12 3 4 5 6 7 8

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与IDT54FCT162500ETPFB相关器件

型号	品牌	获取价格	描述	数据表
IDT54FCT162500ETPV	IDT	获取价格	FAST CMOS 18-BIT REGISTERED TRANSCEIVER
IDT54FCT162500ETPVB	IDT	获取价格	FAST CMOS 18-BIT REGISTERED TRANSCEIVER
IDT54FCT162501AT	IDT	获取价格	FAST CMOS 18-BIT REGISTERED TRANSCEIVER
IDT54FCT162501ATE	IDT	获取价格	FAST CMOS 18-BIT REGISTERED TRANSCEIVER
IDT54FCT162501ATEB	IDT	获取价格	FAST CMOS 18-BIT REGISTERED TRANSCEIVER
IDT54FCT162501ATPA	IDT	获取价格	FAST CMOS 18-BIT REGISTERED TRANSCEIVER
IDT54FCT162501ATPAB	IDT	获取价格	FAST CMOS 18-BIT REGISTERED TRANSCEIVER
IDT54FCT162501ATPF	IDT	获取价格	FAST CMOS 18-BIT REGISTERED TRANSCEIVER
IDT54FCT162501ATPFB	IDT	获取价格	FAST CMOS 18-BIT REGISTERED TRANSCEIVER
IDT54FCT162501ATPV	IDT	获取价格	FAST CMOS 18-BIT REGISTERED TRANSCEIVER

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