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IDT10484S7Y PDF预览

IDT10484S7Y

更新时间: 2024-09-24 20:16:07
品牌 Logo 应用领域
艾迪悌 - IDT 静态存储器光电二极管内存集成电路
页数 文件大小 规格书
7页 95K
描述
Standard SRAM, 4KX4, 7ns, PDSO24

IDT10484S7Y 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:ObsoleteReach Compliance Code:not_compliant
风险等级:5.92最长访问时间:7 ns
I/O 类型:SEPARATEJESD-30 代码:R-PDSO-J24
JESD-609代码:e0内存密度:16384 bit
内存集成电路类型:STANDARD SRAM内存宽度:4
湿度敏感等级:3负电源额定电压:-5.2 V
端子数量:24字数:4096 words
字数代码:4000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:4KX4输出特性:OPEN-EMITTER
封装主体材料:PLASTIC/EPOXY封装代码:SOJ
封装等效代码:SOJ24,.34封装形状:RECTANGULAR
封装形式:SMALL OUTLINE并行/串行:PARALLEL
峰值回流温度(摄氏度):225电源:-5.2 V
认证状态:Not Qualified子类别:SRAMs
表面贴装:YES温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn85Pb15)端子形式:J BEND
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30Base Number Matches:1

IDT10484S7Y 数据手册

 浏览型号IDT10484S7Y的Datasheet PDF文件第2页浏览型号IDT10484S7Y的Datasheet PDF文件第3页浏览型号IDT10484S7Y的Datasheet PDF文件第4页浏览型号IDT10484S7Y的Datasheet PDF文件第5页浏览型号IDT10484S7Y的Datasheet PDF文件第6页浏览型号IDT10484S7Y的Datasheet PDF文件第7页 
PRELIMINARY  
IDT10484, IDT10A484  
IDT100484, IDT100A484  
IDT101484, IDT101A484  
HIGH-SPEED BiCMOS  
ECL STATIC RAM  
16K (4K x 4-BIT) SRAM  
Integrated Device Technology, Inc.  
These devices are part of a family of asynchronous four-  
bit-wide ECL SRAMs. This device is available in both the  
traditional corner-power pinout, and "revolutionary" center-  
power pin configurations. Because they are manufactured in  
BiCEMOS technology, powerdissipationisgreatlyreduced  
over equivalent bipolar devices. Low power operation pro-  
vides higher system reliability and makes possible the use of  
the plastic SOJ package for high-density surface mount  
assembly.  
The fast access time and guaranteed Output Hold time  
allowgreatermarginforsystemtimingvariation. DataINsetup  
time specified with respect to the trailing edge of Write Pulse  
eases write timing allowing balanced Read and Write cycle  
times.  
FEATURES:  
• 4096-words x 4-bit organization  
• Address access time: 4/4.5/5/7/8/10/15 ns  
• Low power dissipation: 900mW (typ.)  
• Guaranteed Output Hold time  
• Fully compatible with ECL logic levels  
• Separate data input and output  
• Corner and Center power pin pinouts  
• Standard through-hole and surface mount packages  
• Guaranteed-performance die available for MCMs/hybrids  
• MIL-STD-883, Class B product available  
DESCRIPTION:  
The IDT10484(10A484), IDT100484(100A484) and  
IDT101484(101A484)are16,384-bithigh-speedBiCEMOS  
ECL static random access memories organized as 4Kx4, with  
separate data inputs and outputs. All I/Os are fully compatible  
with ECL levels.  
FUNCTIONAL BLOCK DIAGRAM  
A
0
16,384-BIT  
MEMORY ARRAY  
V
CC  
EE  
DECODER  
V
A
11  
D
0
Q0  
Q1  
Q2  
Q3  
SENSE AMPS  
AND READ/WRITE  
CONTROL  
D1  
D2  
D3  
WE1  
WE2  
CS  
2811 drw 01  
BiCEMOS is a trademark of Integrated Device Technology, Inc.  
COMMERCIAL TEMPERATURE RANGE  
JANUARY 1992  
1991 Integrated Device Technology, Inc.  
DSC-8018/4  
1

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