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9WDV3501BKLFT PDF预览

9WDV3501BKLFT

更新时间: 2024-02-05 14:19:09
品牌 Logo 应用领域
艾迪悌 - IDT 电源电路电源管理电路监视器
页数 文件大小 规格书
9页 102K
描述
VOLTAGE MONITOR/WATCHDOG TIMER CIRCUIT

9WDV3501BKLFT 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:QFN包装说明:ROHS COMPLIANT, QFN-14
针数:14Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.84Is Samacsys:N
可调阈值:NO模拟集成电路 - 其他类型:POWER SUPPLY MANAGEMENT CIRCUIT
JESD-30 代码:S-PQCC-N14JESD-609代码:e3
长度:4 mm湿度敏感等级:1
信道数量:1功能数量:1
端子数量:14最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:HVQCCN封装等效代码:LCC20,.16SQ,20
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):260电源:3.3 V
认证状态:Not Qualified座面最大高度:1 mm
子类别:Power Management Circuits最大供电电流 (Isup):2.5 mA
最大供电电压 (Vsup):3.63 V最小供电电压 (Vsup):2.97 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
温度等级:COMMERCIAL端子面层:Matte Tin (Sn) - annealed
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:4 mmBase Number Matches:1

9WDV3501BKLFT 数据手册

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Advance Information  
DATASHEET  
VOLTAGE MONITOR/WATCHDOG TIMER CIRCUIT  
ICS9WDV3501B  
General Description:  
The 9WDV3501 contains 5 voltage monitoring (VMON)  
comparators and a watchdog timer circuit. The external voltage  
monitor inputs have a reset threshold of approximately 1.0V.  
Various power supplies can easily be monitored with these  
inputs by use of a simple resistor ladder to divide the supply rail  
down to 1.0V.  
The RESET1# count down period is set by the RST1_DLY(1:0)  
inputs. The additional delay can range from 50ms to 300ms.  
This additional reset is designed to hold the peripheral circuits  
in reset after the microprocessor has been released from reset.  
The VMON circuitry can continue to operate until VDD drops  
below 2.3V.  
There are two RESET# outputs. RESET0# is typically  
connected to a microprocessor, while RESET1# is typically  
connected to peripheral components.  
The watchdog timer monitors transitions on the WDI input. This  
input is usually driven by a GPIO line from a microprocessor and  
is used to detect when the CPU has entered an infinite loop. If a  
transition on the WDI input is not detected within the watchdog  
time out period, both RESET# outputs will be asserted and will  
be as described in the previous paragraph. The watchdog timer  
is restarted when RESET1# goes inactive. The watchdog time  
out period is selectable using the WTB(1:0) inputs. The  
If any of the VMON inputs drops outside the desired operating  
range, both RESET# outputs will be asserted simultaneously.  
They will stay low as long as VMON is below the threshold.  
After VMON rises above the threshold, RESET0# will begin its  
timeout count down and return high after the count down  
expires. The count down period depends on the value on the  
RST0_DLY(1:0) pins. The minimum value is 50ms and the  
maximum value is 300ms. When RESET0# is de-asserted, the  
RESET1# output will continue to be asserted for an additional  
count down period.  
watchdog can be disabled by pulling the WDI_EN pin low.  
The 9WDV3501 incorporates a precision RC oscillator that  
utilized an external trimming resistor for maximum accuracy.  
The recommend value for this resistor is 30K.  
The 9WDV3501 is available in both commercial and industrial  
temperature ranges. It is available in a 20-pin QFN or a 20-pin  
TSSOP package.  
Functional Block Diagram  
VMON0  
+
-
Features:  
5 Precision Voltage Monitors:  
Watchdog Timer  
Selectable Watchdog and Reset Timing  
Two Active Low reset outputs  
Precision Timebase with external trim resistor  
VMON1  
+
-
VMON2  
+
-
VMON3  
+
-
VMON4  
+
-
RST0_DLY(1:0)  
1.00V  
Bandgap  
Reset Timer 0  
RESET0#  
50 to 300 ms  
nominal  
WTB(1:0)  
WatchDog  
Timer  
Reset Timer 1  
50 to 300 ms  
nominal  
RESET1#  
WDI  
Watchdog  
Edge Detector  
RST1_DLY(1:0)  
Master clock  
RP  
Osc  
IDTTM/ICSTM Voltage Monitor/Watchdog Timer Circuit  
1468—05/30/08  
1

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