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9LPRS535BFLFT PDF预览

9LPRS535BFLFT

更新时间: 2024-02-21 16:30:07
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
17页 221K
描述
48-pin CK505 for Intel Systems

9LPRS535BFLFT 数据手册

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Integrated  
Circuit  
Systems, Inc.  
ICS9LPRS535  
Datasheet  
48-pin CK505 for Intel Systems  
Features/Benefits:  
Recommended Application:  
Supports spread spectrum modulation, default is 0.5%  
down spread  
48-pin Low Cost CK505 w/fully integrated VREG and series  
resistors on differential outputs  
Uses external 14.318MHz crystal, external crystal load  
caps are required for frequency tuning  
Output Features:  
Integrated Series Resistors on differential outputs  
2 - CPU differential push-pull pairs  
4 - SRC differential push-pull pairs  
1 - CPU/SRC selectable differential push-pull pair  
1 - SRC/DOT selectable differential push-pull pair  
1- SRC/Stop_Inputs selectable differential push-pull pair  
1 - 25MHz SE1 output for Wake-on-Lan applications  
3 - PCI, 33MHz  
Table 1: CPU Frequency Select Table  
FSLC2 FSLB1 FSLA1  
CPU  
MHz  
SRC  
MHz  
PCI  
MHz  
REF  
MHz  
USB  
MHz  
DOT  
MHz  
B0b7  
B0b6  
B0b5  
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
266.66  
133.33  
200.00  
166.66  
333.33  
100.00  
400.00  
100.00  
33.33 14.318 48.00  
Reserved  
96.00  
1 - USB, 48MHz  
1 - REF, 14.31818MHz  
1. FSLA and FSLB are low-threshold inputs.Please see VIL_FS and VIH_FS specifications in  
the Input/Supply/Common Output Parameters Table for correct values.  
Also refer to the Test Clarification Table.  
2. FSLC is a three-level input. Please see the VIL_FS and VIH_FS  
Key Specifications:  
specifications in the Input/Supply/Common Output Parameters Table for correct values.  
CPU outputs cycle-cycle jitter < 85ps  
SRC output cycle-cycle jitter < 125ps  
PCI outputs cycle-cycle jitter < 250ps  
+/-100ppm frequency accuracy on all clocks  
Pin Configuration  
PCI0/CR#_A 1  
VDDPCI 2  
48 SCLK  
47 SDATA  
PCI4/SRC5_EN 3  
PCI_F5/ITP_EN 4  
GNDPCI 5  
46 REF0/FSLC/TEST_SEL  
45 VDDREF  
44 X1  
VDD48 6  
43 X2  
USB_48MHz/FSLA 7  
GND48 8  
42 GNDREF  
41 FSLB/TEST_MODE  
40 CK_PWRGD/PD#  
39 VDDCPU  
38 CPUT0_LPR  
37 CPUC0_LPR  
36 GNDCPU  
VDD96_IO 9  
DOT96T_LPR/SRCT0_LPR 10  
DOT96C_LPR/SRCC0_LPR 11  
GND 12  
VDD 13  
SE1 14  
GND 15  
SRCT2_LPR/SATAT_LPR 16  
SRCC2_LPR/SATAC_LPR 17  
GNDSRC 18  
35 CPUT1_LPR_F  
34 CPUC1_LPR_F  
33 VDDCPU_IO  
32 CPUT2_ITP_LPR/SRCT8_LPR  
31 CPUC2_ITP_LPR/SRCC8_LPR  
30 VDDSRC_IO  
29 SRCT7_LPR/CR#_F  
28 SRCC7_LPR/CR#_E  
27 GNDSRC  
SRCT3_LPR/CR#_C 19  
SRCC3_LPR/CR#_D 20  
VDDSRC_IO 21  
SRCT4_LPR 22  
SRCC4_LPR 23  
26 VDDSRC  
CPU_STOP#/SRCC5_LPR 24  
25 PCI_STOP#/SRCT5_LPR  
48-SSOP/TSSOP  
* Internal Pull-Up Resistor  
** Internal Pull-Down Resistor  
1461A—07/28/09  
ADVANCE INFORMATION documents contain information on products in the formative or design phase development. Characteristic data and other specifications are design goals.  
ICS reserves the right to change or discontinue these products without notice. Third party brands and names are the property of their respective owners.  

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