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9DB1904BKLF

更新时间： 2024-01-23 05:08:44

品牌	Logo	应用领域
艾迪悌 - IDT		PC
页数	文件大小	规格书
18页	172K
描述
19 Output Differential Buffer for PCIe Gen2 and QPI

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9DB1904BKLF 数据手册

Datasheet

19OutputDifferentialBufferforPCIeGen2andQPI

9DB1904B

Description

Features/Benefits

The 9DB1904 is electrically compatible to the Intel DB1900GS

Differential Buffer Specification.This buffer provides 19 output clocks

for PCI-Express Gen2 or Intel QPI 6.4GT/s applications. A differential

clock from a CK410B+ main clock generator, such as the

ICS932S421 drives the 9DB1904. The 9DB1904 can provide

outputs up to 400MHz in Bypass Mode.

•

Power up default is all outputs in 1:1 mode/No SMBus

programming

•

Spread spectrum compatible/EMI reductions

Supports output frequencies up to 400 MHz in bypass

mode/flexible fanout buffer

•

8 Selectable SMBus addresses/no SMBus

segmentationrequired

SMBus address determines PLL or Bypass mode/pin

savings

DedicatedVDDA and CKPWRGD_PD# pins/easy board

design

Recommended Application

19 Output Differential Buffer for PCIe Gen2 and QPI

Key Specifications

•

DIF output cycle-to-cycle jitter < 50ps

DIF output-to-output skew < 150ps across all outputs

Functionality at Power Up (PLL Mode)

Power Down Functionality

INPUTS

CKPWRGD_ CLK_IN/

OUTPUTS

CLK_IN

DIF_(18:0)

MHz

CLK_IN

100M_133M#

MHz

PLL State

PD#

CLK_IN#

Running

DIF/DIF#

Running

Hi-Z

100MHz

133MHz

OFF

Pin Configuration

72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55

IREF

GNDA

VDDA

54 OE14#

53 DIF_13#

52 DIF_13

51 OE13#

50 DIF_12#

49 DIF_12

48 OE12#

47 VDD

HIGH_BW#

100M_133M#_LV

DIF_0

DIF_0#

DIF_1

DIF_1#

GND 10

VDD 11

DIF_2 12

DIF_2# 13

DIF_3 14

DIF_3# 15

DIF_4 16

46 GND

9DB1904BKLF

45 DIF_11#

44 DIF_11

43 OE11#

42 DIF_10#

41 DIF_10

40 OE10#

39 DIF_9#

38 DIF_9

DIF_4# 17

OE_01234# 18

37 OE9#

19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36

IDT^®19 Output Differential Buffer for PCIe Gen2 and QPI

1607C —04/19/11

12 3 4 5 6 7...18

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